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[/] [ethmac/] [tags/] [rel_25] - Rev 239

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Rev Log message Author Age Path
239 RxError is not generated when small frame reception is enabled and small
frames are received.		 tadejm 7927d 15h /ethmac/tags/rel_25
238 Defines fixed to use generic RAM by default. mohor 7939d 19h /ethmac/tags/rel_25
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 7942d 00h /ethmac/tags/rel_25
235 rev 4. mohor 7942d 15h /ethmac/tags/rel_25
234 Figure list assed to the revision 3. mohor 7942d 23h /ethmac/tags/rel_25
233 Revision 0.3 released. Some figures added. mohor 7942d 23h /ethmac/tags/rel_25
232 fpga define added. mohor 7947d 18h /ethmac/tags/rel_25
231 Description of Core Modules added (figure). mohor 7949d 19h /ethmac/tags/rel_25
229 case changed to casex. mohor 7953d 16h /ethmac/tags/rel_25
227 Changed BIST scan signals. tadejm 7953d 20h /ethmac/tags/rel_25
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 7953d 21h /ethmac/tags/rel_25
225 Some minor changes. tadejm 7953d 21h /ethmac/tags/rel_25
224 Signals for a wave window in Modelsim. tadejm 7953d 23h /ethmac/tags/rel_25
223 Some code changed due to bug fixes. tadejm 7953d 23h /ethmac/tags/rel_25
221 TxStatus is written after last access to the TX fifo is finished (in case of abort
or retry). TxDone is fixed.		 mohor 7957d 21h /ethmac/tags/rel_25
219 txfifo_cnt and rxfifo_cnt counters width is defined in the eth_define.v file,
TxDone and TxRetry are generated after the current WISHBONE access is
finished.		 mohor 7960d 21h /ethmac/tags/rel_25
218 Typo error fixed. (When using Bist) mohor 7960d 23h /ethmac/tags/rel_25
217 Bist supported. mohor 7960d 23h /ethmac/tags/rel_25
216 Bist signals added. mohor 7960d 23h /ethmac/tags/rel_25
215 Bist supported. mohor 7961d 00h /ethmac/tags/rel_25
214 Signals for WISHBONE B3 compliant interface added. mohor 7961d 20h /ethmac/tags/rel_25
213 Defines changed to have ETH_ prolog.
ETH_WISHBONE_B# define added.		 mohor 7961d 20h /ethmac/tags/rel_25
212 Minor $display change. mohor 7961d 20h /ethmac/tags/rel_25
211 Bist added. mohor 7961d 20h /ethmac/tags/rel_25
210 BIST added. mohor 7961d 20h /ethmac/tags/rel_25
209 Just back-up; not completed testbench and some testcases are not
wotking properly yet.		 tadejm 7963d 00h /ethmac/tags/rel_25
208 Virtual Silicon RAMs moved to lib directory tadej 7978d 18h /ethmac/tags/rel_25
207 Virtual Silicon RAM support fixed tadej 7978d 18h /ethmac/tags/rel_25
206 Virtual Silicon RAM added to the simulation. mohor 7978d 18h /ethmac/tags/rel_25
205 ETH_VIRTUAL_SILICON_RAM supported. mohor 7978d 18h /ethmac/tags/rel_25

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