OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_27/] - Rev 89

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
89 TX_BD_NUM, MAC_ADDR0 and MAC_ADDR1 register description
changed.		 mohor 8138d 20h /ethmac/tags/rel_27
88 rx_fifo was not always cleared ok. Fixed. mohor 8144d 18h /ethmac/tags/rel_27
87 Status was not latched correctly sometimes. Fixed. mohor 8144d 21h /ethmac/tags/rel_27
86 Big Endian problem when sending frames fixed. mohor 8146d 04h /ethmac/tags/rel_27
85 Log info was missing. mohor 8151d 13h /ethmac/tags/rel_27
84 LinkFail signal was not latching appropriate bit. mohor 8151d 13h /ethmac/tags/rel_27
83 MAC address recognition was not correct (bytes swaped). mohor 8151d 14h /ethmac/tags/rel_27
82 Byte ordering changed (Big Endian used). casex changed with case because
Xilinx Foundation had problems. Tested in HW. It WORKS.		 mohor 8151d 15h /ethmac/tags/rel_27
81 Typos fixed, INT_SOURCE and INT_MASK registers changed. mohor 8151d 16h /ethmac/tags/rel_27
80 Small fixes for external/internal DMA missmatches. mohor 8155d 18h /ethmac/tags/rel_27
79 RetryCntLatched was unused and removed from design mohor 8155d 18h /ethmac/tags/rel_27
78 WB_SEL_I was unused and removed from design mohor 8155d 18h /ethmac/tags/rel_27
77 Interrupts changed mohor 8155d 18h /ethmac/tags/rel_27
76 Interrupts changed in the top file mohor 8155d 18h /ethmac/tags/rel_27
75 r_Bro is used for accepting/denying frames mohor 8155d 18h /ethmac/tags/rel_27
74 Reset values are passed to registers through parameters mohor 8155d 18h /ethmac/tags/rel_27
73 Number of interrupts changed mohor 8155d 18h /ethmac/tags/rel_27
72 Retry is not activated when a Tx Underrun occured mohor 8159d 22h /ethmac/tags/rel_27
71 Address recognition system added. Buffer Descriptors changed. DMA section
changed. Ports changed.		 mohor 8163d 23h /ethmac/tags/rel_27
70 Small fixes. mohor 8164d 00h /ethmac/tags/rel_27
69 Define missmatch fixed. mohor 8164d 21h /ethmac/tags/rel_27
68 Registered trimmed. Unused registers removed. mohor 8165d 20h /ethmac/tags/rel_27
67 EXTERNAL_DMA used instead of WISHBONE_DMA. mohor 8165d 21h /ethmac/tags/rel_27
66 Testbench fixed, code simplified, unused signals removed. mohor 8166d 03h /ethmac/tags/rel_27
65 Testbench fixed, code simplified, unused signals removed. mohor 8166d 03h /ethmac/tags/rel_27
64 Status was not written correctly when frames were discarted because of
address mismatch.		 mohor 8166d 17h /ethmac/tags/rel_27
63 RxAbort is connected differently. mohor 8166d 21h /ethmac/tags/rel_27
62 RxAbort is an output. No need to have is declared as wire. mohor 8166d 21h /ethmac/tags/rel_27
61 RxStartFrm cleared when abort or retry comes. mohor 8166d 22h /ethmac/tags/rel_27
60 Changes that were lost when updating from 1.5 to 1.8 fixed. mohor 8166d 23h /ethmac/tags/rel_27

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.