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[/] [ethmac/] [tags/] [rel_27] - Rev 239

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Rev Log message Author Age Path
239 RxError is not generated when small frame reception is enabled and small
frames are received.		 tadejm 7887d 13h /ethmac/tags/rel_27
238 Defines fixed to use generic RAM by default. mohor 7899d 17h /ethmac/tags/rel_27
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 7901d 22h /ethmac/tags/rel_27
235 rev 4. mohor 7902d 13h /ethmac/tags/rel_27
234 Figure list assed to the revision 3. mohor 7902d 21h /ethmac/tags/rel_27
233 Revision 0.3 released. Some figures added. mohor 7902d 21h /ethmac/tags/rel_27
232 fpga define added. mohor 7907d 16h /ethmac/tags/rel_27
231 Description of Core Modules added (figure). mohor 7909d 18h /ethmac/tags/rel_27
229 case changed to casex. mohor 7913d 14h /ethmac/tags/rel_27
227 Changed BIST scan signals. tadejm 7913d 18h /ethmac/tags/rel_27
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 7913d 20h /ethmac/tags/rel_27
225 Some minor changes. tadejm 7913d 20h /ethmac/tags/rel_27
224 Signals for a wave window in Modelsim. tadejm 7913d 21h /ethmac/tags/rel_27
223 Some code changed due to bug fixes. tadejm 7913d 21h /ethmac/tags/rel_27
221 TxStatus is written after last access to the TX fifo is finished (in case of abort
or retry). TxDone is fixed.		 mohor 7917d 19h /ethmac/tags/rel_27
219 txfifo_cnt and rxfifo_cnt counters width is defined in the eth_define.v file,
TxDone and TxRetry are generated after the current WISHBONE access is
finished.		 mohor 7920d 20h /ethmac/tags/rel_27
218 Typo error fixed. (When using Bist) mohor 7920d 22h /ethmac/tags/rel_27
217 Bist supported. mohor 7920d 22h /ethmac/tags/rel_27
216 Bist signals added. mohor 7920d 22h /ethmac/tags/rel_27
215 Bist supported. mohor 7920d 23h /ethmac/tags/rel_27
214 Signals for WISHBONE B3 compliant interface added. mohor 7921d 18h /ethmac/tags/rel_27
213 Defines changed to have ETH_ prolog.
ETH_WISHBONE_B# define added.		 mohor 7921d 18h /ethmac/tags/rel_27
212 Minor $display change. mohor 7921d 19h /ethmac/tags/rel_27
211 Bist added. mohor 7921d 19h /ethmac/tags/rel_27
210 BIST added. mohor 7921d 19h /ethmac/tags/rel_27
209 Just back-up; not completed testbench and some testcases are not
wotking properly yet.		 tadejm 7922d 22h /ethmac/tags/rel_27
208 Virtual Silicon RAMs moved to lib directory tadej 7938d 16h /ethmac/tags/rel_27
207 Virtual Silicon RAM support fixed tadej 7938d 16h /ethmac/tags/rel_27
206 Virtual Silicon RAM added to the simulation. mohor 7938d 16h /ethmac/tags/rel_27
205 ETH_VIRTUAL_SILICON_RAM supported. mohor 7938d 17h /ethmac/tags/rel_27

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