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[/] [ethmac/] [tags/] [rel_4/] - Rev 127

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Rev Log message Author Age Path
127 WriteRxDataToMemory signal changed so end of frame (when last word is
written to fifo) is changed.		 mohor 7996d 10h /ethmac/tags/rel_4
126 InvalidSymbol generation changed. mohor 7996d 11h /ethmac/tags/rel_4
125 RxAbort changed. Packets received with MRxErr (from PHY) are also
aborted.		 mohor 7996d 11h /ethmac/tags/rel_4
124 Define ETH_MIIMODER_RST corrected to 0x00000400. mohor 7996d 11h /ethmac/tags/rel_4
122 ethernet spram added. So far a generic ram and xilinx RAMB4 are used. mohor 7998d 12h /ethmac/tags/rel_4
121 gsr added for use when ETH_XILINX_RAMB4 define is set. mohor 7998d 12h /ethmac/tags/rel_4
120 Unused files removed. mohor 7998d 13h /ethmac/tags/rel_4
119 Ram , used for BDs changed from generic_spram to eth_spram_256x32. mohor 7998d 13h /ethmac/tags/rel_4
118 ShiftEnded synchronization changed. mohor 8002d 04h /ethmac/tags/rel_4
117 Clock mrx_clk set to 2.5 MHz. mohor 8002d 15h /ethmac/tags/rel_4
116 Testing environment also includes traffic cop, memory interface and host
interface.		 mohor 8002d 15h /ethmac/tags/rel_4
115 RxBDAddress takes `ETH_TX_BD_NUM_DEF value after reset. mohor 8003d 13h /ethmac/tags/rel_4
114 EXTERNAL_DMA removed. External DMA not supported. mohor 8004d 10h /ethmac/tags/rel_4
113 RxPointer bug fixed. mohor 8011d 02h /ethmac/tags/rel_4
112 Previous bug wasn't succesfully removed. Now fixed. mohor 8011d 16h /ethmac/tags/rel_4
111 Master state machine had a bug when switching from master write to
master read.		 mohor 8012d 05h /ethmac/tags/rel_4
110 m_wb_cyc_o signal released after every single transfer. mohor 8012d 08h /ethmac/tags/rel_4
109 Comment removed. mohor 8012d 09h /ethmac/tags/rel_4
108 Testbench supports unaligned accesses. mohor 8079d 18h /ethmac/tags/rel_4
107 TX_BUF_BASE changed. mohor 8079d 18h /ethmac/tags/rel_4
106 Outputs registered. Reset changed for eth_wishbone module. mohor 8079d 19h /ethmac/tags/rel_4
105 Compiler directives added. Tx and Rx fifo size incremented. A "late collision"
bug fixed.		 mohor 8088d 20h /ethmac/tags/rel_4
104 FCS should not be included in NibbleMinFl. mohor 8090d 14h /ethmac/tags/rel_4
103 Wishbone signals are registered when ETH_REGISTERED_OUTPUTS is
selected in eth_defines.v		 mohor 8090d 15h /ethmac/tags/rel_4
102 Interrupts are visible in the ETH_INT_SOURCE regardless if they are enabled
or not.		 mohor 8090d 15h /ethmac/tags/rel_4
101 Short frame and ReceivedLengthOK were not detected correctly. mohor 8090d 15h /ethmac/tags/rel_4
100 Generic ram or Xilinx ram can be used in fifo (selectable by setting
ETH_FIFO_XILINX in eth_defines.v).		 mohor 8090d 15h /ethmac/tags/rel_4
99 Document revised. mohor 8097d 14h /ethmac/tags/rel_4
98 Document revised. mohor 8097d 14h /ethmac/tags/rel_4
97 Small typo fixed. lampret 8114d 12h /ethmac/tags/rel_4

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