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Rev Log message Author Age Path
175 Script fixed to new dir structure mohor 7933d 08h /ethmac/tags/rel_5
174 Directory keeper mohor 7933d 08h /ethmac/tags/rel_5
173 Keeps the directory mohor 7933d 08h /ethmac/tags/rel_5
172 NCSIM simulation environment added to cvs mohor 7933d 08h /ethmac/tags/rel_5
171 NCSIM simulation environment added. mohor 7933d 08h /ethmac/tags/rel_5
170 Headers changed. mohor 7933d 08h /ethmac/tags/rel_5
169 New testbench. Thanks to Tadej M - "The Spammer". mohor 7933d 09h /ethmac/tags/rel_5
168 CarrierSenseLost bug fixed when operating in full duplex mode. mohor 7934d 06h /ethmac/tags/rel_5
167 Sometimes both RxB_IRQ and RxE_IRQ were activated. Bug fixed. mohor 7935d 06h /ethmac/tags/rel_5
166 Reception is possible after RxPointer is read and not after BD is read. For
that reason RxBDReady is changed to RxReady.
Busy_IRQ interrupt connected. When there is no RxBD ready and frame
comes, interrupt is generated.		 mohor 7936d 07h /ethmac/tags/rel_5
165 HASH improvement needed. mohor 7936d 10h /ethmac/tags/rel_5
164 Ethernet debug registers removed. mohor 7936d 10h /ethmac/tags/rel_5
163 Another temporary version. Core is almost finished. Testbench not included,
yet"		 mohor 7937d 02h /ethmac/tags/rel_5
162 Another temporary version. Core is almost finished. Testbench not included,
yet.		 mohor 7937d 02h /ethmac/tags/rel_5
161 Error acknowledge is generated when accessing BDs and RST bit in the
MODER register (r_Rst) is set.		 mohor 7937d 08h /ethmac/tags/rel_5
160 error acknowledge cycle termination added to display. mohor 7937d 08h /ethmac/tags/rel_5
159 Async reset for WB_ACK_O removed (when core was in reset, it was
impossible to access BDs).
RxPointers and TxPointers names changed to be more descriptive.
TxUnderRun synchronized.		 mohor 7938d 04h /ethmac/tags/rel_5
158 Typo fixed. mohor 7938d 05h /ethmac/tags/rel_5
157 This testbench will soon be obsolete. Please use tb_ethernet.v mohor 7940d 10h /ethmac/tags/rel_5
156 Valid testbench. mohor 7940d 10h /ethmac/tags/rel_5
155 Minor changes. mohor 7940d 10h /ethmac/tags/rel_5
154 Design document is still under construction. mohor 7941d 09h /ethmac/tags/rel_5
153 Temp version (backup). mohor 7942d 00h /ethmac/tags/rel_5
152 Version 1.16 created. See revision history in the document for details. mohor 7942d 00h /ethmac/tags/rel_5
150 Debug registers reg1, 2, 3, 4 connected. Synchronization of many signals
changed (bugs fixed). Access to un-alligned buffers fixed. RxAbort signal
was not used OK.		 mohor 7942d 02h /ethmac/tags/rel_5
149 Signals related to the control frames connected. Debug registers reg1, 2, 3, 4
connected.		 mohor 7942d 02h /ethmac/tags/rel_5
148 Bug when last byte of destination address was not checked fixed. mohor 7942d 02h /ethmac/tags/rel_5
147 ETH_TXCTRL and ETH_RXCTRL registers added. Interrupts related to
the control frames connected.		 mohor 7942d 02h /ethmac/tags/rel_5
146 CarrierSenseLost status is not set when working in loopback mode. mohor 7942d 02h /ethmac/tags/rel_5
145 Defines for control registers added (ETH_TXCTRL and ETH_RXCTRL). mohor 7942d 02h /ethmac/tags/rel_5

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