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166 Reception is possible after RxPointer is read and not after BD is read. For
that reason RxBDReady is changed to RxReady.
Busy_IRQ interrupt connected. When there is no RxBD ready and frame
comes, interrupt is generated.		 mohor 7943d 04h /ethmac/tags/rel_9
165 HASH improvement needed. mohor 7943d 07h /ethmac/tags/rel_9
164 Ethernet debug registers removed. mohor 7943d 08h /ethmac/tags/rel_9
163 Another temporary version. Core is almost finished. Testbench not included,
yet"		 mohor 7943d 23h /ethmac/tags/rel_9
162 Another temporary version. Core is almost finished. Testbench not included,
yet.		 mohor 7943d 23h /ethmac/tags/rel_9
161 Error acknowledge is generated when accessing BDs and RST bit in the
MODER register (r_Rst) is set.		 mohor 7944d 05h /ethmac/tags/rel_9
160 error acknowledge cycle termination added to display. mohor 7944d 05h /ethmac/tags/rel_9
159 Async reset for WB_ACK_O removed (when core was in reset, it was
impossible to access BDs).
RxPointers and TxPointers names changed to be more descriptive.
TxUnderRun synchronized.		 mohor 7945d 02h /ethmac/tags/rel_9
158 Typo fixed. mohor 7945d 02h /ethmac/tags/rel_9
157 This testbench will soon be obsolete. Please use tb_ethernet.v mohor 7947d 07h /ethmac/tags/rel_9
156 Valid testbench. mohor 7947d 07h /ethmac/tags/rel_9
155 Minor changes. mohor 7947d 07h /ethmac/tags/rel_9
154 Design document is still under construction. mohor 7948d 06h /ethmac/tags/rel_9
153 Temp version (backup). mohor 7948d 22h /ethmac/tags/rel_9
152 Version 1.16 created. See revision history in the document for details. mohor 7948d 22h /ethmac/tags/rel_9
150 Debug registers reg1, 2, 3, 4 connected. Synchronization of many signals
changed (bugs fixed). Access to un-alligned buffers fixed. RxAbort signal
was not used OK.		 mohor 7948d 23h /ethmac/tags/rel_9
149 Signals related to the control frames connected. Debug registers reg1, 2, 3, 4
connected.		 mohor 7948d 23h /ethmac/tags/rel_9
148 Bug when last byte of destination address was not checked fixed. mohor 7948d 23h /ethmac/tags/rel_9
147 ETH_TXCTRL and ETH_RXCTRL registers added. Interrupts related to
the control frames connected.		 mohor 7948d 23h /ethmac/tags/rel_9
146 CarrierSenseLost status is not set when working in loopback mode. mohor 7949d 00h /ethmac/tags/rel_9
145 Defines for control registers added (ETH_TXCTRL and ETH_RXCTRL). mohor 7949d 00h /ethmac/tags/rel_9
143 Only values smaller or equal to 0x80 can be written to TX_BD_NUM register.
r_TxEn and r_RxEn depend on the limit values of the TX_BD_NUMOut.		 mohor 7965d 02h /ethmac/tags/rel_9
141 Syntax error fixed. mohor 7967d 20h /ethmac/tags/rel_9
140 Syntax error fixed. mohor 7967d 20h /ethmac/tags/rel_9
139 Synchronous reset added to all registers. Defines used for width. r_MiiMRst
changed from bit position 10 to 9.		 mohor 7967d 20h /ethmac/tags/rel_9
138 Synchronous reset added. mohor 7967d 20h /ethmac/tags/rel_9
137 Defines for register width added. mii_rst signal in MIIMODER register
changed.		 mohor 7967d 20h /ethmac/tags/rel_9
136 Parameter ResetValue changed to capital letters. mohor 7968d 06h /ethmac/tags/rel_9
135 New revision. External DMA removed, TX_BD_NUM changed. mohor 7969d 21h /ethmac/tags/rel_9
134 Register TX_BD_NUM is changed so it contains value of the Tx buffer descriptors. No
need to multiply or devide any more.		 mohor 7969d 23h /ethmac/tags/rel_9

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