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[/] [ethmac10g/] [tags/] [V10/] - Rev 72

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Rev Log message Author Age Path
72 New directory structure. root 5591d 16h /ethmac10g/tags/V10
40 This commit was manufactured by cvs2svn to create tag 'V10'. 6605d 07h /tags/V10
39 first version fisher5090 6605d 07h /trunk
38 deleted fisher5090 6605d 08h /trunk
37 no message fisher5090 6605d 08h /trunk
36 no message godzilla 6668d 17h /trunk
35 no message godzilla 6671d 16h /trunk
34 Rewritten code. godzilla 6671d 16h /trunk
33 Rewritten code. godzilla 6671d 17h /trunk
32 no message fisher5090 6689d 01h /trunk
31 no message fisher5090 6689d 01h /trunk
30 no message fisher5090 6717d 00h /trunk
29 no message fisher5090 6717d 09h /trunk
28 First commit. 32-bit counter. Synthesizes with no errors in Xilinx XST. mvpratt 6719d 19h /trunk
27 xilinx coregen fisher5090 6730d 00h /trunk
26 good edition fisher5090 6730d 00h /trunk
25 no message fisher5090 6730d 00h /trunk
24 First cut. One of the main culprits for the timing violations. godzilla 6732d 15h /trunk
23 First cut. Original code from Easic but add some extra controls. One of the main culprits for the timing violations. godzilla 6732d 16h /trunk
22 First cut. Original code from Easic but add some extra controls. godzilla 6732d 16h /trunk
21 First cut. Not thoroughly tested yet but still need to implement the configuration, non-crc version and stats.
So far Leonardo Precison indicates the design can run upto 101 MHz but need to remove the timing violations to increase speed.		 godzilla 6732d 16h /trunk
20 First cut. Still need to update the document with design changes. godzilla 6732d 16h /trunk
19 First cut. godzilla 6732d 16h /trunk
18 works well fisher5090 6737d 05h /trunk
17 crc test fisher5090 6737d 12h /trunk
16 use counter fisher5090 6740d 20h /trunk
15 crc module fisher5090 6740d 20h /trunk
14 no more used fisher5090 6740d 20h /trunk
13 first commit. not yet ready to compile mvpratt 6740d 21h /trunk
12 200MHZ fisher5090 6742d 05h /trunk

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