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Rev Log message Author Age Path
221 Documentation updated ja_rd 4414d 19h /ion/trunk
220 New script for configuration package generation.
New directory for all utility scripts		 ja_rd 4415d 04h /ion/trunk
219 Added windows binary for MIPS simulator 'slite' to the SVN repo, for convenience. ja_rd 4415d 11h /ion/trunk
218 UART bug fix: rx_rdy flag must be clear only when reading the rx buffer ja_rd 4418d 18h /ion/trunk
217 Removed another SoC file prematurely committed ja_rd 4425d 08h /ion/trunk
216 First draft of SoC removed.
I'll rename it from mips_mcu in order to keep the svn log.		 ja_rd 4425d 08h /ion/trunk
215 First draft of MIPS SoC
Still unused by any of the code samples.
Eventually will replace the mips_mcu entity		 ja_rd 4425d 09h /ion/trunk
214 Updated pre-generated 'Hello' demo, recompiled and retested with the latest changes. ja_rd 4425d 17h /ion/trunk
213 Memory test application updated -- added extra-simple D-Cache test.
The new test is a row of back-to-back I/O reads and writes.
This test triggers a bug in the cache that has been already fixed.		 ja_rd 4425d 17h /ion/trunk
212 BUG FIX: sequences of back-to-back I/O reads or writes didn't work.
The stall conditions were wrong for those cases.
Minor cleanup of the comments		 ja_rd 4425d 17h /ion/trunk
211 Included a simulated block of I/O regs in the test bench for easing some cache tests. ja_rd 4425d 17h /ion/trunk
210 Added new Tex sources
New doc sources organized according to Tex guidelines		 ja_rd 4605d 04h /ion/trunk
209 Documentation reorganization
Updated PDF committed
Old Tex sources removed
Old plain text file removed		 ja_rd 4605d 04h /ion/trunk
208 Bug fix in SW simulator
Crashed when a function call trace log was requested with missing map file		 ja_rd 4691d 11h /ion/trunk
207 Simulation memories now modelled with shared variables and not signals.
This improves simulation speed of large programs (e.g. Adventure) by orders of magnitude		 ja_rd 4704d 13h /ion/trunk
206 Fixed SygnalSpy function calls for compatibility with older versions of Modelsim ja_rd 4704d 13h /ion/trunk
205 Fixed bug in test bench interface to CPU ja_rd 4725d 12h /ion/trunk
204 Bug fixed in simulation script (Thank you Khadijeh!) ja_rd 4725d 12h /ion/trunk
203 Opcode test program prepared to test interrupts
(by using special simulated hardware in the test bench)
More changes to come, this is just the first commit of many		 ja_rd 4739d 12h /ion/trunk
202 Modelsim wave window script tidied up a bit
This is mostly useless anyway		 ja_rd 4739d 12h /ion/trunk
201 Minor fixes to code comments ja_rd 4739d 12h /ion/trunk
200 CPU interrupt input changed to 8-bit vector
Other modules changed accordingly
Interrupts still missing; this is just preparing the interface		 ja_rd 4739d 12h /ion/trunk
199 Fixed missing references ja_rd 4740d 05h /ion/trunk
198 Added new version of the project doc in LaTeX ja_rd 4740d 05h /ion/trunk
197 Updated readme stuff for the code samples ja_rd 4741d 03h /ion/trunk
196 Marked old TB template as obsolete.
I'm not comfortable removing it yet. Silly, that.		 ja_rd 4741d 03h /ion/trunk
195 Template for TB parameter package.
This file is 'filled in' with actual info by a python script.		 ja_rd 4741d 03h /ion/trunk
194 Removed deprecated files from old TB version ja_rd 4741d 04h /ion/trunk
193 Major test bench reorganization:
1.- TB now uses same object code as synthesizable demo.
2.- TB now simulates full MPU system.
3.- Console logging moved to TB package.
4.- Code sample makefiles and modelsim script updated accordingly.		 ja_rd 4741d 04h /ion/trunk
192 Code ROM template for MCU
Contains bootstrap object code to be placed on BRAM		 ja_rd 4745d 13h /ion/trunk

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