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[/] [ion/] [trunk] - Rev 230

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Rev Log message Author Age Path
230 Modelsim script updated to latest HW changes ja_rd 4414d 11h /ion/trunk
229 Code samples updated to use new VHDL config packages and new SoC (UART). ja_rd 4414d 11h /ion/trunk
228 SW simulator updated
Simulation of UART adapted to new hardware.
Added simulation of debug registers.		 ja_rd 4414d 11h /ion/trunk
227 Removed modules no longer used:
code_rom_pkg replaced by new package in SoC directory.
RS232 sub-modules replaced by new UART		 ja_rd 4414d 11h /ion/trunk
226 Updated demo and test bench to use new SoC entity. ja_rd 4414d 11h /ion/trunk
225 Added utility functions for the initialization of BRAM memories. ja_rd 4414d 11h /ion/trunk
224 MCU entity gutted and transformed into a SoC entity
Different UART, new generics...		 ja_rd 4414d 12h /ion/trunk
223 MCU entity renamed to SoC, moved to separate SoC directory ja_rd 4414d 12h /ion/trunk
222 Documentation updated ja_rd 4414d 12h /ion/trunk
221 Documentation updated ja_rd 4414d 12h /ion/trunk
220 New script for configuration package generation.
New directory for all utility scripts		 ja_rd 4414d 21h /ion/trunk
219 Added windows binary for MIPS simulator 'slite' to the SVN repo, for convenience. ja_rd 4415d 04h /ion/trunk
218 UART bug fix: rx_rdy flag must be clear only when reading the rx buffer ja_rd 4418d 11h /ion/trunk
217 Removed another SoC file prematurely committed ja_rd 4425d 01h /ion/trunk
216 First draft of SoC removed.
I'll rename it from mips_mcu in order to keep the svn log.		 ja_rd 4425d 01h /ion/trunk
215 First draft of MIPS SoC
Still unused by any of the code samples.
Eventually will replace the mips_mcu entity		 ja_rd 4425d 02h /ion/trunk
214 Updated pre-generated 'Hello' demo, recompiled and retested with the latest changes. ja_rd 4425d 10h /ion/trunk
213 Memory test application updated -- added extra-simple D-Cache test.
The new test is a row of back-to-back I/O reads and writes.
This test triggers a bug in the cache that has been already fixed.		 ja_rd 4425d 10h /ion/trunk
212 BUG FIX: sequences of back-to-back I/O reads or writes didn't work.
The stall conditions were wrong for those cases.
Minor cleanup of the comments		 ja_rd 4425d 10h /ion/trunk
211 Included a simulated block of I/O regs in the test bench for easing some cache tests. ja_rd 4425d 10h /ion/trunk
210 Added new Tex sources
New doc sources organized according to Tex guidelines		 ja_rd 4604d 21h /ion/trunk
209 Documentation reorganization
Updated PDF committed
Old Tex sources removed
Old plain text file removed		 ja_rd 4604d 21h /ion/trunk
208 Bug fix in SW simulator
Crashed when a function call trace log was requested with missing map file		 ja_rd 4691d 04h /ion/trunk
207 Simulation memories now modelled with shared variables and not signals.
This improves simulation speed of large programs (e.g. Adventure) by orders of magnitude		 ja_rd 4704d 06h /ion/trunk
206 Fixed SygnalSpy function calls for compatibility with older versions of Modelsim ja_rd 4704d 06h /ion/trunk
205 Fixed bug in test bench interface to CPU ja_rd 4725d 05h /ion/trunk
204 Bug fixed in simulation script (Thank you Khadijeh!) ja_rd 4725d 05h /ion/trunk
203 Opcode test program prepared to test interrupts
(by using special simulated hardware in the test bench)
More changes to come, this is just the first commit of many		 ja_rd 4739d 05h /ion/trunk
202 Modelsim wave window script tidied up a bit
This is mostly useless anyway		 ja_rd 4739d 05h /ion/trunk
201 Minor fixes to code comments ja_rd 4739d 05h /ion/trunk

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