| Rev |
Log message |
Author |
Age |
Path |
| 44 |
toplevel of the Modular Simultaneous Exponentiation IP core for the PLB interface |
JonasDC |
4239d 23h |
/mod_sim_exp/tags/Release_1.4 |
| 43 |
made the core parameters generics |
JonasDC |
4239d 23h |
/mod_sim_exp/tags/Release_1.4 |
| 42 |
corrected wrong library name for mod_sim_exp_pkg |
JonasDC |
4246d 07h |
/mod_sim_exp/tags/Release_1.4 |
| 41 |
removed deprecated files from version control |
JonasDC |
4246d 07h |
/mod_sim_exp/tags/Release_1.4 |
| 40 |
adjusted core instantiation to new core module name |
JonasDC |
4254d 11h |
/mod_sim_exp/tags/Release_1.4 |
| 39 |
changed files to remove warnings from synthesis
last cell logic is simplified because of redundant logic |
JonasDC |
4254d 22h |
/mod_sim_exp/tags/Release_1.4 |
| 38 |
deprecated design files because of new pipeline structure, will be removed shortly |
JonasDC |
4255d 04h |
/mod_sim_exp/tags/Release_1.4 |
| 37 |
changed names of some generics of the multiplier.
moved the parameters for the core to the package of the core
testbench now uses this parameters to adapt to different bit widths
and new systolic pipeline now supports split or single pipeline |
JonasDC |
4259d 01h |
/mod_sim_exp/tags/Release_1.4 |
| 36 |
found bug in new pipeline structure, now working properly. (tested in sim)
mod_sim_exp_core uses new flexible pipeline as default. |
JonasDC |
4259d 21h |
/mod_sim_exp/tags/Release_1.4 |
| 35 |
new test values, 1st exponentiation gives error on result with new pipeline
commit for test purposes |
JonasDC |
4259d 23h |
/mod_sim_exp/tags/Release_1.4 |
| 34 |
operand memory now supports custom operand widths, the internal memory stays the fixed 1536 bit, but the bus width is now adjustable to any size below. |
JonasDC |
4260d 00h |
/mod_sim_exp/tags/Release_1.4 |
| 33 |
default pipeline changed to old version, there seems to be an occasional error with new version. |
JonasDC |
4260d 03h |
/mod_sim_exp/tags/Release_1.4 |
| 32 |
new systolic pipeline structure now has split pipeline support, tested and verified in simulation. the core now uses this pipeline by default. |
JonasDC |
4260d 04h |
/mod_sim_exp/tags/Release_1.4 |
| 31 |
put first cell logic of the pipeline in a separate design unit, tested and working |
JonasDC |
4260d 09h |
/mod_sim_exp/tags/Release_1.4 |
| 30 |
put last cell logic of the pipeline in a separate design unit, tested and working |
JonasDC |
4260d 10h |
/mod_sim_exp/tags/Release_1.4 |
| 29 |
added software for generation of test input for the tesbenches |
JonasDC |
4260d 23h |
/mod_sim_exp/tags/Release_1.4 |
| 28 |
updated makefile for new pipeline sources |
JonasDC |
4261d 00h |
/mod_sim_exp/tags/Release_1.4 |
| 27 |
test input values for multiplier_tb |
JonasDC |
4261d 00h |
/mod_sim_exp/tags/Release_1.4 |
| 26 |
testbench for only the montgommery multiplier |
JonasDC |
4261d 00h |
/mod_sim_exp/tags/Release_1.4 |
| 25 |
first version of new pipeline design. allows for more flexibility in nr of stages.
does not support split pipeline support yet. currently only works for single pipeline |
JonasDC |
4261d 00h |
/mod_sim_exp/tags/Release_1.4 |
| 24 |
changed names of top-level module to mod_sim_exp_core |
JonasDC |
4264d 09h |
/mod_sim_exp/tags/Release_1.4 |
| 23 |
added descriptive comments |
JonasDC |
4264d 10h |
/mod_sim_exp/tags/Release_1.4 |
| 22 |
updated the systolic pipeline with descriptive signal names and comments |
JonasDC |
4267d 04h |
/mod_sim_exp/tags/Release_1.4 |
| 21 |
changed x_i signal to xi |
JonasDC |
4268d 11h |
/mod_sim_exp/tags/Release_1.4 |
| 20 |
added comments, changed signal name of x_reg_i to x_reg.
File is now according to OC design rules |
JonasDC |
4268d 11h |
/mod_sim_exp/tags/Release_1.4 |
| 19 |
updated files with descriptive comments
changed signal names and removed redundant signals in stepping_logic |
JonasDC |
4273d 06h |
/mod_sim_exp/tags/Release_1.4 |
| 18 |
updated stages with comments and renamed some signals for consistency |
JonasDC |
4274d 06h |
/mod_sim_exp/tags/Release_1.4 |
| 17 |
updated files with descriptive comments and removed unnecessary signals in standard stage. Files are now according to OC design rules |
JonasDC |
4274d 11h |
/mod_sim_exp/tags/Release_1.4 |
| 16 |
package with modified generic parameter for register_n |
JonasDC |
4275d 00h |
/mod_sim_exp/tags/Release_1.4 |
| 15 |
changed generic for register width from n to width for consistency |
JonasDC |
4275d 00h |
/mod_sim_exp/tags/Release_1.4 |
