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URL https://opencores.org/ocsvn/oms8051mini/oms8051mini/trunk

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[/] [oms8051mini] - Rev 28

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Rev Log message Author Age Path
28 i2c master is added dinesha 2768d 15h /oms8051mini
27 I2C master is integrated dinesha 2769d 05h /oms8051mini
26 8051 pc_next logic is added dinesha 2769d 12h /oms8051mini
25 8051 core reset active edge changed from high to low dinesha 2770d 09h /oms8051mini
24 All Instruction C code added dinesha 2772d 02h /oms8051mini
23 c code removed dinesha 2772d 02h /oms8051mini
22 New C Model added dinesha 2772d 02h /oms8051mini
21 New test case dinesha 2772d 06h /oms8051mini
20 RTL cleanup dinesha 2779d 05h /oms8051mini
19 Uart Message Handler added as register master dinesha 2785d 07h /oms8051mini
18 External ROM Mode Clean-UP dinesha 2786d 11h /oms8051mini
17 50 unix help command added dinesha 2792d 14h /oms8051mini
16 .dat file is removed from svn dinesha 2793d 12h /oms8051mini
15 Clean up dinesha 2793d 12h /oms8051mini
14 Tb Clean up dinesha 2794d 05h /oms8051mini
13 Example added into svn dinesha 2794d 13h /oms8051mini
12 Help directory added dinesha 2794d 13h /oms8051mini
11 changed 32 bit to 8 bit register interface dinesha 2797d 04h /oms8051mini
10 EXTERNAL ROM option is removed dinesha 2798d 14h /oms8051mini
9 Modelsim golden log file dinesha 2808d 05h /oms8051mini
8 irun update for cadence flow dinesha 2808d 05h /oms8051mini
7 Uart test case cleanup dinesha 2808d 05h /oms8051mini
6 Uart Message Handler added into SVN and Uart fixs dinesha 2808d 08h /oms8051mini
5 Irun Rename dinesha 2809d 05h /oms8051mini
4 Irun update dinesha 2809d 05h /oms8051mini
3 GMAC related test cases are removed dinesha 2810d 05h /oms8051mini
2 Initial version;
1. Ported from turbo8051 core data base
1. Removed the GMAC related logic and verif componets		 dinesha 2810d 05h /oms8051mini
1 The project and the structure was created root 2810d 10h /oms8051mini

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