| Rev |
Log message |
Author |
Age |
Path |
| 335 |
Switched o8_version.vhd to integer generics to make assignment from higher-level tools simpler,
Uploaded new version of TaskMan.zip, which uses the newer components |
jshamlet |
306d 02h |
/open8_urisc/trunk/VHDL |
| 334 |
Updated version register to match task switcher example and rom core for the romtape entity |
jshamlet |
307d 04h |
/open8_urisc/trunk/VHDL |
| 333 |
Fixed missing semicolons in o8_sys_timer_ii.vhd,
Added faulting address capture in the RAM models,
Modified o8_ram_1k.vhd to use 32-bit WPR |
jshamlet |
307d 16h |
/open8_urisc/trunk/VHDL |
| 331 |
Added custom SPI LCD interface (pending receive side) and watchdog timer. Also modified system timer II to use aliases |
jshamlet |
307d 19h |
/open8_urisc/trunk/VHDL |
| 330 |
Updated to route RAM write fault signal and force CPU interrupts to task manager requirements. |
jshamlet |
314d 02h |
/open8_urisc/trunk/VHDL |
| 329 |
Added a core that specifically supports the task switcher software. It merges o8_int_mgr16 with a wide register, allowing full control of I/O peripherals by the task switcher software. This also allows the task switcher to be enabled for the full 16 I/O write qualification lines, which had previously only been supported in the task data setup. |
jshamlet |
314d 03h |
/open8_urisc/trunk/VHDL |
| 327 |
More bug fixes:
Added write qual line to LTC2355 interface, fixed bug where output data was duplicating the lower byte in the averager, added an initial romtape.hex file |
jshamlet |
315d 04h |
/open8_urisc/trunk/VHDL |
| 326 |
Minor comment correction |
jshamlet |
321d 02h |
/open8_urisc/trunk/VHDL |
| 325 |
Added the rest of the initializers to the signal assignments |
jshamlet |
321d 03h |
/open8_urisc/trunk/VHDL |
| 324 |
Modified the Open8 version of the multi-channel roll average code to have separate interrupt enables for average and flush operations. Note that the flush status bit should be checked by software prior to use if the Autoflush_On_Reset generic is set TRUE.
Also adding the ROMTAPE entity, which acts as a serial-access ROM for storing strings, arrays, etc. in order to alleviate pressure on the primary program ROM. It is intended for use with loops that load fixed content from ROM. |
jshamlet |
321d 03h |
/open8_urisc/trunk/VHDL |
| 323 |
Forgot to add files |
jshamlet |
322d 01h |
/open8_urisc/trunk/VHDL |
| 322 |
Performance fixes for the LCD interface,
Fixed incorrect entity name for the dual LTC2355 IF,
Added a CPU-accessible 8-channel averager core and FIFO-style ROM |
jshamlet |
322d 01h |
/open8_urisc/trunk/VHDL |
| 321 |
Fixed issue with parity flag in receiver sticking |
jshamlet |
425d 19h |
/open8_urisc/trunk/VHDL |
| 320 |
Inverted flow control signals to match EIA-232 specification |
jshamlet |
427d 21h |
/open8_urisc/trunk/VHDL |
| 319 |
Fixed off-by-one error in channel count |
jshamlet |
429d 01h |
/open8_urisc/trunk/VHDL |
| 318 |
Added o8_scale_conv.vhd and intdiv.vhd |
jshamlet |
433d 03h |
/open8_urisc/trunk/VHDL |
| 317 |
Altered the reinit signal on teh adc128s022.vhd driver to be optional, and removed the "dead" signal from the upper level o8_de0_nano_adc_if.vhd code. |
jshamlet |
446d 23h |
/open8_urisc/trunk/VHDL |
| 316 |
More code cleanup and comments,
Removed INT_VECTOR_n constants, as they are superfluous. There are no reasonable situations in which the constants would be altered. |
jshamlet |
446d 23h |
/open8_urisc/trunk/VHDL |
| 315 |
Added Terasic DE0 Nano ADC interface and rolling averager. |
jshamlet |
447d 01h |
/open8_urisc/trunk/VHDL |
| 314 |
Code cleanup and added comments |
jshamlet |
447d 02h |
/open8_urisc/trunk/VHDL |
| 313 |
Added all generics to package component |
jshamlet |
447d 03h |
/open8_urisc/trunk/VHDL |
| 312 |
Added o8_timer24.vhd as a more flexible alternative to o8_sys_timer_ii.vhd.
Also cleaned up some comments in the HTML documentation |
jshamlet |
447d 03h |
/open8_urisc/trunk/VHDL |
| 310 |
Added optional DACadv signal to advance the PWM engine using an external signal. This is used to synchronize the DAC with other DACs or for streaming multiple streams across a high-speed serial link. |
jshamlet |
518d 05h |
/open8_urisc/trunk/VHDL |
| 308 |
|
jshamlet |
539d 19h |
/open8_urisc/trunk/VHDL |
| 307 |
Fixed comments on o8_version.vhd |
jshamlet |
747d 05h |
/open8_urisc/trunk/VHDL |
| 299 |
Modified the status_led.vhd to slow down the DIM50PCT signal to 1/32 instead of 1/2 for use with shift-register based discrete LEDs and added the ability to chain the toggle signal to save on resources as well as synchronize the "toggling" |
jshamlet |
755d 16h |
/open8_urisc/trunk/VHDL |
| 298 |
Fixed a long-standing bug in the SBC instruction where the 1 wasn't being added to complete the 2's complement of Rn. This was causing off-by-one errors in subtraction and negating carry only subtractions. |
jshamlet |
756d 18h |
/open8_urisc/trunk/VHDL |
| 297 |
Fixed register map comments |
jshamlet |
1047d 03h |
/open8_urisc/trunk/VHDL |
| 296 |
Removed parallel interface from o8_vector_rx.vhd, modified vector_tx.vhd to use a generic for it's seed value, slight formatting change on o8_elapsed_usec.vhd. |
jshamlet |
1055d 18h |
/open8_urisc/trunk/VHDL |
| 295 |
Undoing previous revision. UART was fine, bug reporter was not. |
jshamlet |
1058d 22h |
/open8_urisc/trunk/VHDL |
