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[/] [openmsp430/] [trunk/] [core] - Rev 105

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105 Removed dummy memory read access for the MOV/PUSH/CALL/RETI instructions.
These were not problematic but this is simply cleaner that way.		 olivier.girard 4877d 04h /openmsp430/trunk/core
103 Removed the timescale from all RTL files.
Added possibility to exclude the "includes" statements from the RTL.		 olivier.girard 4882d 11h /openmsp430/trunk/core
102 Fixed bug reported by Mihai ( http://opencores.org/bug,view,1955 ).
The following PUSH instructions are now working as expected:

- indexed mode: PUSH x(R1)
- indirect register mode: PUSH @R1
- indirect autoincrement: PUSH @R1+		 olivier.girard 4883d 03h /openmsp430/trunk/core
101 Cosmetic change in order to prevent an X propagation whenever executing a byte instruction with an uninitialized memory location as source. olivier.girard 4883d 05h /openmsp430/trunk/core
99 Small fix for CVER simulator support. olivier.girard 4887d 05h /openmsp430/trunk/core
98 Added support for VCS verilog simulator.
VPD and TRN waveforms can now be generated.		 olivier.girard 4887d 05h /openmsp430/trunk/core
95 Update some test patterns for the additional simulator supports. olivier.girard 4891d 05h /openmsp430/trunk/core
94 Thanks to Mihai-Costin Manolescu's contribution, the simulation scripts now support the following simulators:
- Icarus Verilog
- Cver
- Verilog-XL
- NCVerilog
- Modelsim		 olivier.girard 4891d 05h /openmsp430/trunk/core
91 Fixed bug when an IRQ arrives while CPU is halted through the serial debug interface.
This bug is CRITICAL for people using working with interrupts and the Serial Debug Interface.		 olivier.girard 4895d 06h /openmsp430/trunk/core
86 Update serial debug interface test patterns to make them work with all program memory configurations. olivier.girard 4918d 02h /openmsp430/trunk/core
85 Diverse RTL cosmetic updates. olivier.girard 4918d 04h /openmsp430/trunk/core
84 Update SRAM model in the core testbench to prevent the IEEE warning when running simulations.
Update watchdog to fix NMI synchronisation problem.
Add synchronizers for the PUC signal in the debug interface.		 olivier.girard 4923d 05h /openmsp430/trunk/core
80 Create initial version of the Actel FPGA implementation example. olivier.girard 4972d 12h /openmsp430/trunk/core
79 Update the GPIO peripheral to fix a potential synchronization issue. olivier.girard 4984d 06h /openmsp430/trunk/core
76 Add possibility to simulate C code within the "core" environment. olivier.girard 4989d 04h /openmsp430/trunk/core
74 Update serial debug interface to support memories with a size which is not a power of 2.
Update the software tools accordingly.		 olivier.girard 5071d 05h /openmsp430/trunk/core
73 Update all bash scripts headers with "#!/bin/bash" instead of "#!/bin/sh".
This will prevent compatibility problems in systems where bash isn't the default shell.		 olivier.girard 5096d 06h /openmsp430/trunk/core
72 Expand configurability options of the program and data memory sizes. olivier.girard 5098d 06h /openmsp430/trunk/core
68 Update synthesis scripts with the hardware multiplier support. olivier.girard 5245d 13h /openmsp430/trunk/core
67 Added 16x16 Hardware Multiplier. olivier.girard 5245d 13h /openmsp430/trunk/core
66 The peripheral templates are now under BSD license.
Developers of new peripherals based on these templates won't have to disclose their code.		 olivier.girard 5245d 17h /openmsp430/trunk/core
65 Add possibility to disable waveform dumping by setting the OMSP_NODUMP environment variable to 1. olivier.girard 5256d 04h /openmsp430/trunk/core
64 Add Actel synthesis environment for size and speed analysis. olivier.girard 5266d 13h /openmsp430/trunk/core
63 Add Altera synthesis environment for size and speed analysis. olivier.girard 5266d 13h /openmsp430/trunk/core
62 Add Xilinx synthesis environment for size&speed analysis. olivier.girard 5266d 15h /openmsp430/trunk/core
60 Cleanup of the PC (R0) generation logic.
Formal equivalence was shown between the new and old code with Synopsys' Formality (to make sure that nothing has been broken :-P ).		 olivier.girard 5277d 04h /openmsp430/trunk/core
58 Update the debug hardware breakpoint verification patterns to reflect the latest design updates. olivier.girard 5279d 02h /openmsp430/trunk/core
57 Update design to exclude the range mode from the debug hardware breakpoint units. As this feature is not used by GDB, it has been disabled in order to improve the timings and save a bit of area/utilisation.
Note that if required, this feature can be re-enabled through the `HWBRK_RANGE define located in the "openMSP430_defines.v" file.		 olivier.girard 5279d 02h /openmsp430/trunk/core
56 Update Design Compiler Synthesis scripts. olivier.girard 5283d 09h /openmsp430/trunk/core
55 Add a "sandbox" test pattern to play around with the simulation :-P olivier.girard 5284d 04h /openmsp430/trunk/core

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