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[/] [openmsp430/] [trunk/] [core] - Rev 141

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141 Update verification environment to support MSPGCC Uniarch (based on GCC 4.5 and later) olivier.girard 4447d 13h /openmsp430/trunk/core
139 Add some SVN ignore patterns olivier.girard 4459d 23h /openmsp430/trunk/core
138 Update simulation scripts to support Cygwin out of the box for Windows users. olivier.girard 4459d 23h /openmsp430/trunk/core
134 Add full ASIC support (low-power modes, DFT, ...).
Improved serial debug interface reliability.
olivier.girard 4491d 14h /openmsp430/trunk/core
132 Update FPGA examples with the POP.B bug fix olivier.girard 4504d 13h /openmsp430/trunk/core
130 Fixed POP.B bug (see Bugtracker http://opencores.org/bug,assign,2137 ) olivier.girard 4512d 12h /openmsp430/trunk/core
128 Fixed CALL x(SR) bug (see Bugtracker http://opencores.org/bug,view,2111 ) olivier.girard 4588d 13h /openmsp430/trunk/core
122 Add coverage report generation (NCVERILOG only)
Add support for the ISIM Xilinx simulator.
olivier.girard 4660d 14h /openmsp430/trunk/core
117 To facilitate commercial adoption of the openMSP430, the core has moved to a modified BSD license. olivier.girard 4764d 15h /openmsp430/trunk/core
115 Add linker script example. olivier.girard 4789d 14h /openmsp430/trunk/core
112 Modified comment. olivier.girard 4797d 13h /openmsp430/trunk/core
111 Re-organized the "openMSP430_defines.v" file.
Re-defined the CPU_ID register of the debug interface (in particular to support custom user versioning).
Added RTL configuration possibility to expand the peripheral address space from 512B (0x0000 to 0x0200) to up to 32kB (0x0000 to 0x8000).
As a consequence the per_addr bus width goes from 8 to 14 bits and the peripherals address decoders have been updated accordingly.
olivier.girard 4798d 13h /openmsp430/trunk/core
106 Separated the Timer A defines from the openMSP430 ones.
Added the "dbg_en" port in order to allow a separate reset of the debug interface.
Added the "core_en" port (when cleared, the CPU will stop execution, the dbg_freeze signal will be set and the aclk & smclk will be stopped).
Renamed "per_wen" to "per_we" to prevent confusion with active low signals.
Removed to missing unused flops when the DBG_EN is not defined (thanks to Mihai contribution).
olivier.girard 4854d 12h /openmsp430/trunk/core
105 Removed dummy memory read access for the MOV/PUSH/CALL/RETI instructions.
These were not problematic but this is simply cleaner that way.
olivier.girard 4869d 13h /openmsp430/trunk/core
103 Removed the timescale from all RTL files.
Added possibility to exclude the "includes" statements from the RTL.
olivier.girard 4874d 19h /openmsp430/trunk/core
102 Fixed bug reported by Mihai ( http://opencores.org/bug,view,1955 ).
The following PUSH instructions are now working as expected:

- indexed mode: PUSH x(R1)
- indirect register mode: PUSH @R1
- indirect autoincrement: PUSH @R1+
olivier.girard 4875d 12h /openmsp430/trunk/core
101 Cosmetic change in order to prevent an X propagation whenever executing a byte instruction with an uninitialized memory location as source. olivier.girard 4875d 14h /openmsp430/trunk/core
99 Small fix for CVER simulator support. olivier.girard 4879d 14h /openmsp430/trunk/core
98 Added support for VCS verilog simulator.
VPD and TRN waveforms can now be generated.
olivier.girard 4879d 14h /openmsp430/trunk/core
95 Update some test patterns for the additional simulator supports. olivier.girard 4883d 13h /openmsp430/trunk/core
94 Thanks to Mihai-Costin Manolescu's contribution, the simulation scripts now support the following simulators:
- Icarus Verilog
- Cver
- Verilog-XL
- NCVerilog
- Modelsim
olivier.girard 4883d 14h /openmsp430/trunk/core
91 Fixed bug when an IRQ arrives while CPU is halted through the serial debug interface.
This bug is CRITICAL for people using working with interrupts and the Serial Debug Interface.
olivier.girard 4887d 14h /openmsp430/trunk/core
86 Update serial debug interface test patterns to make them work with all program memory configurations. olivier.girard 4910d 11h /openmsp430/trunk/core
85 Diverse RTL cosmetic updates. olivier.girard 4910d 13h /openmsp430/trunk/core
84 Update SRAM model in the core testbench to prevent the IEEE warning when running simulations.
Update watchdog to fix NMI synchronisation problem.
Add synchronizers for the PUC signal in the debug interface.
olivier.girard 4915d 14h /openmsp430/trunk/core
80 Create initial version of the Actel FPGA implementation example. olivier.girard 4964d 21h /openmsp430/trunk/core
79 Update the GPIO peripheral to fix a potential synchronization issue. olivier.girard 4976d 14h /openmsp430/trunk/core
76 Add possibility to simulate C code within the "core" environment. olivier.girard 4981d 13h /openmsp430/trunk/core
74 Update serial debug interface to support memories with a size which is not a power of 2.
Update the software tools accordingly.
olivier.girard 5063d 14h /openmsp430/trunk/core
73 Update all bash scripts headers with "#!/bin/bash" instead of "#!/bin/sh".
This will prevent compatibility problems in systems where bash isn't the default shell.
olivier.girard 5088d 15h /openmsp430/trunk/core

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