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[/] [openmsp430/] [trunk/] [fpga/] - Rev 86

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86 Update serial debug interface test patterns to make them work with all program memory configurations. olivier.girard 4913d 03h /openmsp430/trunk/fpga
85 Diverse RTL cosmetic updates. olivier.girard 4913d 05h /openmsp430/trunk/fpga
84 Update SRAM model in the core testbench to prevent the IEEE warning when running simulations.
Update watchdog to fix NMI synchronisation problem.
Add synchronizers for the PUC signal in the debug interface.		 olivier.girard 4918d 06h /openmsp430/trunk/fpga
83 Add Oscilloscope screenshot + link to the original game. olivier.girard 4964d 06h /openmsp430/trunk/fpga
82 Update Actel example project:
- synthesis scripts.
- Spacewar demo program.
- SVN ignore patterns for diverse directories		 olivier.girard 4964d 06h /openmsp430/trunk/fpga
81 Initial synthesis, P&R setup for the Actel example project. olivier.girard 4967d 04h /openmsp430/trunk/fpga
80 Create initial version of the Actel FPGA implementation example. olivier.girard 4967d 13h /openmsp430/trunk/fpga
79 Update the GPIO peripheral to fix a potential synchronization issue. olivier.girard 4979d 06h /openmsp430/trunk/fpga
74 Update serial debug interface to support memories with a size which is not a power of 2.
Update the software tools accordingly.		 olivier.girard 5066d 06h /openmsp430/trunk/fpga
73 Update all bash scripts headers with "#!/bin/bash" instead of "#!/bin/sh".
This will prevent compatibility problems in systems where bash isn't the default shell.		 olivier.girard 5091d 06h /openmsp430/trunk/fpga
72 Expand configurability options of the program and data memory sizes. olivier.girard 5093d 07h /openmsp430/trunk/fpga
71 Update the FPGA example projects with the newer openMSP430 core including the hardware multiplier. olivier.girard 5240d 06h /openmsp430/trunk/fpga
61 Update openMSP430 rtl. olivier.girard 5272d 04h /openmsp430/trunk/fpga
59 Update the FPGA projects with the latest core design updates. olivier.girard 5274d 03h /openmsp430/trunk/fpga
54 Update FPGA projects with the combinatorial loop fixed. olivier.girard 5279d 07h /openmsp430/trunk/fpga
43 Re-add documentation (earlier pdf was broken). olivier.girard 5308d 04h /openmsp430/trunk/fpga
42 olivier.girard 5308d 04h /openmsp430/trunk/fpga
41 Update bitstream & SVN ignore patterns. olivier.girard 5308d 04h /openmsp430/trunk/fpga
40 Minor updates. olivier.girard 5308d 04h /openmsp430/trunk/fpga
39 Update FPGA projects with new openMSP430 core. olivier.girard 5308d 04h /openmsp430/trunk/fpga
38 Remove old core version. olivier.girard 5308d 05h /openmsp430/trunk/fpga
37 olivier.girard 5308d 05h /openmsp430/trunk/fpga
36 Remove old core version. olivier.girard 5308d 05h /openmsp430/trunk/fpga
32 Minor update to the HTML documentation + add some SVN ignore properties to the Altera FPGA project simulation directory. olivier.girard 5310d 04h /openmsp430/trunk/fpga
30 Add Altera Cyclone II FPGA project example (thanks to Vadim Akimov contribution). olivier.girard 5310d 05h /openmsp430/trunk/fpga
29 Add Altera Cyclone II FPGA project example. olivier.girard 5310d 06h /openmsp430/trunk/fpga
28 renamed "diligent_s3board" directory to "xilinx_diligent_s3board" olivier.girard 5318d 13h /openmsp430/trunk/fpga
27 renamed "diligent_s3board" directory to "xilinx_diligent_s3board" olivier.girard 5318d 13h /openmsp430/trunk/fpga
26 Xilinx implementation example:
- update the project directory structure.
- make a local copy of the openMSP430 core to make the project self contained.		 olivier.girard 5318d 13h /openmsp430/trunk/fpga
25 FPGA Setup: Created some BAT files for WINDOWS users. olivier.girard 5408d 11h /openmsp430/trunk/fpga

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