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[/] [openrisc/] [tags/] [or1ksim/] [or1ksim-0.5.0rc1/] [doc/] - Rev 775

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347 Tagging the 0.5.0rc1 candidate release of Or1ksim. jeremybennett 5052d 09h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc
346 Changes to support Or1ksim 0.5.0rc1

Top level changes:

* config.h.in: Regenerated.
* debug.cfg, rsp.cfg: Deleted.
* doc/or1ksim.texi: Updated for new options and library interface.
* doc/or1ksim.info, doc/version.texi: Regenerated.
* Makefile.am: Added sim.cfg to EXTRA_DIST.
* NEWS: Updated for 0.5.0rc1.
* or1ksim.h <enum or1ksim_rc>: OR1KSIM_RC_OK explicitly zero.
* sim.cfg: Updated for consistency with the user guide.
* sim-config.c (init_defconfig): 50000 as default VAPI port.
(alloc_memory_block): Verbose message of amount allocated.
* configure: Regenerated.
* configure.ac: Version changed to 0.5.0rc1.

Changes in testsuite:

* libsim.tests/int-edge.exp <int-edge simple 1>: Increase time
between interrupts to 2ms.
<int-edge simple 2>: Increase time between interrupts to 2ms.
<int-edge duplicated 1>: Increase time between interrupts to 2ms.
<int-edge duplicated 2>: Increase time between interrupts to 2ms.

Changes in testsuite/test-code-or1k:

* mc-common/except-mc.S: Remove leading underscores from global
symbols.
* except/except.S: Remove leading underscores from global symbols.
* cache/cache-asm.S: Remove leading underscores from global symbols.
* cache/cache.c (jump_and_link): Remove leading underscore from
label.
(jump): Remove leading underscore from label.
(all): Remove leading underscore from global symbol references.
* testfloat/systfloat.S: Remove leading underscores from global
symbols.
* mmu/mmu.c (jump): Remove leading underscore from label.
* mmu/mmu-asm.S: Remove leading underscores from global symbols.
* except-test/except-test.c: Remove leading underscores from
global symbols.
* except-test/except-test-s.S: Remove leading underscores from
global symbols.
* uos/except-or32.S: Remove leading underscores from global
symbols.
* configure: Regenerated.
* configure.ac: Version changed to 0.5.0rc1.
jeremybennett 5052d 09h /openrisc/trunk/or1ksim/doc
240 or1ksim build fixups for Cygwin copilation julius 5082d 11h /openrisc/trunk/or1ksim/doc
236 Terminate execution on NOP_EXIT, even if debugging, add support for RSP qAttached packet, stall in library after single instruction is ST bit is set in SPR DMR1. Fix softfloat to allow compilation with -O0 for debugging.

* configure: Regenerated.
* configure.ac: Version changed to current date. Test for
varargs.h dropped.
* cpu/or32/insnset.c <l_nop>: Terminate execution on NOP_EXIT,
even if debugging.
* debug/rsp-server.c (rsp_query): Added support for qAttached
packet.
* libtoplevel.c (or1ksim_run): Stall after a single instruction if
SPR_DMR1_ST flag is set.
* softfloat/host.h: Make #define of INLINE conditional, to allow
the user to override.
* softfloat/README: Added instructions for non-optimized compilation.
* softfloat/softfloat-macros: Add a conditional #ifndef
NO_SOFTFLOAT_UNUSUED around unused functions.
jeremybennett 5086d 04h /openrisc/trunk/or1ksim/doc
235 Removed support for old OpenRISC JTAG Remote Protocol. jeremybennett 5086d 09h /openrisc/trunk/or1ksim/doc
234 Minor tidy ups. DOS end of line chars fixed. jeremybennett 5087d 11h /openrisc/trunk/or1ksim/doc
233 New softfloat FPU and testfloat sw for or1ksim julius 5087d 21h /openrisc/trunk/or1ksim/doc
230 Changed library interface. Fixed namespace problems with instruction lookup in library.

* configure: Regenerated.
* configure.ac: Version changed to current date.
* cpu/or1k/opcode/or32.h <or1ksim_build_automata>: Renamed from
build_automata.
<l_none, num_opcodes, insn_index>: Deleted.
<or1ksim_op_start>: Renamed from op_start.
<or1ksim_automata>: Renamed from automata.
<or1ksim_ti>: Renamed from ti.
<or1ksim_or32_opcodes>: Renamed from or32_opcodes.
<or1ksim_disassembled>: Renamed from disassembled.
<or1ksim_insn_len>: Renamed from insn_len.
<or1ksim_insn_name>: Renamed from insn_name.
<or1ksim_destruct_automata>: Renamed from destruct_automata.
<or1ksim_insn_decode>: Renamed from insn_decode.
<or1ksim_disassemble_insn>: Renamed from disassemble_insn.
<or1ksim_disassemble_index>: Renamed from disassemble_index.
<or1ksim_extend_imm>: Renamed from extend_imm.
<or1ksim_or32_extract>: Renamed from or32_extract
* cpu/or32/or32.c, cpu/or32/execute.c, cpu/or32/generate.c,
* cpu/common/stats.c, cpu/common/abstract.c, cpu/common/parse.c,
* cpu/or1k/opcode/or32.h, cuc/load.c, cuc/cuc.c,
* support/dumpverilog.c, toplevel-support.c: Renaming
corresponding to changes in cpu/or1k/opcode/or32.h.
* cpu/or32/execute-fp.h: Deleted
* cpu/or32/generate.c <include_strings>: Remove reference to
execute-fp.h
* cpu/or32/execute.c <host_fp_rm>: Declared static.
(fp_set_flags_restore_host_rm, fp_set_or1k_rm): Declared static,
forward declaration removed.
* or1ksim.h (or1ksim_read_mem, or1ksim_write_mem): addr arg
changed to unsigned long int.
(or1ksim_read_spr): sprval_ptr arg changed to unsigned long int *.
(or1ksim_write_spr): sprval arg changed to unsigned long int.
(or1ksim_read_reg): regval_ptr arg changed to unsigned long int *.
(or1ksim_write_reg): regval arg changed to unsigned long int.
* libtoplevel.c (or1ksim_read_mem, or1ksim_write_mem): addr arg
changed to unsigned long int.
(or1ksim_read_spr): sprval_ptr arg changed to unsigned long int *.
(or1ksim_write_spr): sprval arg changed to unsigned long int.
(or1ksim_read_reg): regval_ptr arg changed to unsigned long int *.
(or1ksim_write_reg): regval arg changed to unsigned long int.
jeremybennett 5089d 02h /openrisc/trunk/or1ksim/doc
226 Orksim floating point support additions, spr-defs.h updates, newlib cache init routines updated julius 5091d 03h /openrisc/trunk/or1ksim/doc
224 Add new library functions and modify existing ones. Change the parameter type enumarations to upper case. New (simplified and corrected) config file parsing. No include files or default sim.cfg. jeremybennett 5091d 10h /openrisc/trunk/or1ksim/doc
220 Updated library interface to take a full command line (this will break all old code). Added -q/--quiet and --report-memory-errors flags to command line. Fixed all tests to match this. jeremybennett 5098d 02h /openrisc/trunk/or1ksim/doc
202 Adding executed log in binary format capability to or1ksim julius 5104d 06h /openrisc/trunk/or1ksim/doc
143 Fix building for Cygwin with GCC 3.4.4 (Bug 1797). Fix breakpoints with instruction cache enabled (Bug 195). jeremybennett 5121d 06h /openrisc/trunk/or1ksim/doc
134 Updates for stable release 0.4.0 jeremybennett 5129d 10h /openrisc/trunk/or1ksim/doc
127 New config option to allow l.xori with unsigned operand. jeremybennett 5135d 06h /openrisc/trunk/or1ksim/doc
124 Overflow handling now in line with architecture manual. Tests added. jeremybennett 5136d 02h /openrisc/trunk/or1ksim/doc
123 Implementation of l.mfspr and l.mtspr corrected to use bitwise OR rather than addition. Associated tests added. jeremybennett 5136d 06h /openrisc/trunk/or1ksim/doc
121 Adds exception handling to l.jalr and l.jr. Adds appropriate tests. jeremybennett 5137d 03h /openrisc/trunk/or1ksim/doc
118 New tests of multiply. Improved tests of exception handling for addition and division. Improvements to instruction testing library. jeremybennett 5138d 00h /openrisc/trunk/or1ksim/doc
116 Updated to fix l.maci and add tests for l.mac, l.maci, l.macrc and l.msb. Fixed bugs in the old Or1ksim mul test at the same time. jeremybennett 5140d 03h /openrisc/trunk/or1ksim/doc
112 Tidy ups to Ethernet test fixes. new tests for l.add. Fixes so l.add computes overflow correctly, and generates a range exception if the the OVE bit is set in the supervision register. jeremybennett 5142d 02h /openrisc/trunk/or1ksim/doc
110 or1ksim make check should work without a libc in the or32-elf tools julius 5143d 04h /openrisc/trunk/or1ksim/doc
107 New instruction set testing infrastructure. Fix for l.div/li.divu (Bug 1770) and tests for that bug. jeremybennett 5145d 03h /openrisc/trunk/or1ksim/doc
104 Candidate release 0.4.0rc4 jeremybennett 5148d 10h /openrisc/trunk/or1ksim/doc
101 ChangeLog updated for floating point support. Fixed bug in generic peripheral upcalls. Upped release date in configure.ac. Removed redundant debugging print in abstract.c jeremybennett 5157d 04h /openrisc/trunk/or1ksim/doc
100 Single precision FPU stuff for or1ksim julius 5157d 07h /openrisc/trunk/or1ksim/doc
99 Bug in test evaluation for library fixed. jeremybennett 5162d 04h /openrisc/trunk/or1ksim/doc
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5163d 06h /openrisc/trunk/or1ksim/doc
97 Updates to test the new JTAG library interface (not yet complete). jeremybennett 5177d 12h /openrisc/trunk/or1ksim/doc
96 Various changes which had not been picked up in earlier commits. jeremybennett 5178d 13h /openrisc/trunk/or1ksim/doc

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