| Rev |
Log message |
Author |
Age |
Path |
| 500 |
ORPSoC's System C UART model can now accept input from stdin during simulation to drive consoles etc
ML501 simulation makefile update to allow custom ELFs to be specified |
julius |
4898d 14h |
/openrisc/trunk |
| 499 |
ORPSoC OR1200 updates - added l.ext instructions with tests, ammended some MAC bugs, decode stage cleanup |
julius |
4899d 07h |
/openrisc/trunk |
| 498 |
or_debug_proxy updates to documentation and Makefile related to latest ftd2xx driver, |
julius |
4900d 20h |
/openrisc/trunk |
| 497 |
or_debug_proxy updates |
julius |
4901d 16h |
/openrisc/trunk |
| 496 |
ORPSoC ml501 updates - increased frequency, updated documentation |
julius |
4901d 17h |
/openrisc/trunk |
| 495 |
ORPSoC adding more accessor functions to Micron SDRAM model. |
julius |
4901d 18h |
/openrisc/trunk |
| 494 |
Change to ensure handles ctrl-C correctly with empty line. |
jeremybennett |
4912d 11h |
/openrisc/trunk |
| 493 |
ORPSoC VPI JTAG interface, hopefully fix 64-bit machine compile issues. |
julius |
4914d 20h |
/openrisc/trunk |
| 492 |
ORPSoC VPI interface for modelsim and documentation update |
julius |
4915d 18h |
/openrisc/trunk |
| 491 |
ORPSoC or1200_monitor update. |
julius |
4916d 04h |
/openrisc/trunk |
| 490 |
Updates to fix spurious test failures and register scheduling. |
jeremybennett |
4920d 10h |
/openrisc/trunk |
| 489 |
ORPSoC sw cleanup. Remove warnings. |
julius |
4925d 17h |
/openrisc/trunk |
| 488 |
ORPSoC OR1200 driver - tick timer exception handler reverted to generic - cpu tick function hook used as default in handler table. OR1200 timer demo sw for board added. |
julius |
4925d 17h |
/openrisc/trunk |
| 487 |
ORPSoC main software makefile update |
julius |
4928d 15h |
/openrisc/trunk |
| 486 |
ORPSoC updates, mainly software, i2c driver |
julius |
4928d 15h |
/openrisc/trunk |
| 485 |
ORPSoC updates - or1200 monitor now has separate defines file, ethmac updates to fifos and wishbone IF, board.h changes for UART (may propegate to other drivers with multiple cores, we'll see), crt0.S for or1200 now zeros all registers on reset, adding own ethernet tests for ML501 |
julius |
4932d 20h |
/openrisc/trunk |
| 484 |
Changes to make r12 call-saved and to bring wchar tests in line. |
jeremybennett |
4933d 18h |
/openrisc/trunk |
| 483 |
Updated with new opcodes to generate random numbers and to identify us as Or1ksim. |
jeremybennett |
4935d 20h |
/openrisc/trunk |
| 482 |
Don't hardcode tool versions in help text |
olof |
4937d 08h |
/openrisc/trunk |
| 481 |
OR1200 Update. RTL and spec. |
julius |
4949d 03h |
/openrisc/trunk |
| 480 |
ORPSoC updates - ml501 project cleanups, DDR2 cache bug fixes. |
julius |
4950d 00h |
/openrisc/trunk |
| 479 |
ORPSoC update to ml501 board port. Memory controller caching fixed up, does multiple lines of cache and Wishbone bursting. |
julius |
4951d 00h |
/openrisc/trunk |
| 478 |
ORPSoC update - ml501 or1200 cache configuration set to maximum, some cleanups. |
julius |
4952d 15h |
/openrisc/trunk |
| 477 |
ORPSoC update - Added ability to enable OR1200 caches up to 32KB, which requires line size of 32bytes and 8-beat Wishbone bursts.
Changed cache sizes of both instruction and data cache of reference design to 4kB each. |
julius |
4953d 00h |
/openrisc/trunk |
| 476 |
ORPSoC updates. Added 16kB cache options to OR1200, now as default on reference design. Cleaned up simulation Makefile more. |
julius |
4953d 17h |
/openrisc/trunk |
| 475 |
ORPSoC main simulation makefile tidy up, addition of BSS test to cbasic test, addition or o1ksim config files for each board build, modification of BSS symbols in linker script and crt0. |
julius |
4953d 19h |
/openrisc/trunk |
| 474 |
uC/OS-II port linker flags updated. |
julius |
4954d 01h |
/openrisc/trunk |
| 473 |
Fix typos in tool chain build script. Add build script for BusyBox/uClibc/Linux. Delete obsolete scripts, improve board description for test, add -pthread flag to GCC for Linux. |
jeremybennett |
4954d 20h |
/openrisc/trunk |
| 472 |
Various changes which improve the quality of the tracing. |
jeremybennett |
4954d 21h |
/openrisc/trunk |
| 471 |
Adding ucos-ii port. |
julius |
4957d 00h |
/openrisc/trunk |
