Rev |
Log message |
Author |
Age |
Path |
625 |
Fixed configuration to work with GCC 4.6, added -Werror to avoid GCC 4.6 warning as a temporary fix. Added pic.cfg to EXTRA_DIST. Made tests build with SILENT_RULES if available. |
jeremybennett |
4744d 06h |
/openrisc/trunk/or1ksim/ChangeLog |
561 |
or1ksim - timer module, spr-defs.h re-bugfix |
julius |
4808d 05h |
/openrisc/trunk/or1ksim/ChangeLog |
556 |
or1ksim - added performance counters unit and test for it. |
julius |
4813d 23h |
/openrisc/trunk/or1ksim/ChangeLog |
552 |
or1ksim - cpu/ cleanup - remove dynamic execution model WIP, and dlx, or16 targets |
julius |
4815d 07h |
/openrisc/trunk/or1ksim/ChangeLog |
538 |
or1ksim updates. spr-def.h updates, Cygwin compile error fixes. |
julius |
4842d 03h |
/openrisc/trunk/or1ksim/ChangeLog |
532 |
Ensure the halted flag is cleared when the processor is unstalled. |
jeremybennett |
4853d 00h |
/openrisc/trunk/or1ksim/ChangeLog |
510 |
Updates for release 0.5.1rc1. |
jeremybennett |
4873d 07h |
/openrisc/trunk/or1ksim/ChangeLog |
508 |
Updates for Or1ksim 0.5.0rc3. |
jeremybennett |
4874d 07h |
/openrisc/trunk/or1ksim/ChangeLog |
494 |
Change to ensure handles ctrl-C correctly with empty line. |
jeremybennett |
4916d 00h |
/openrisc/trunk/or1ksim/ChangeLog |
483 |
Updated with new opcodes to generate random numbers and to identify us as Or1ksim. |
jeremybennett |
4939d 09h |
/openrisc/trunk/or1ksim/ChangeLog |
472 |
Various changes which improve the quality of the tracing. |
jeremybennett |
4958d 10h |
/openrisc/trunk/or1ksim/ChangeLog |
460 |
Merged in changes from Jeremy to Ethernet, updated documentation of tests, added l.nop 8 and l.nop 9 opcodes to turn tracing on and off. Updated documentation to cover l.nop opcodes. |
jeremybennett |
4966d 08h |
/openrisc/trunk/or1ksim/ChangeLog |
458 |
or1ksim testsuite updates |
julius |
4967d 12h |
/openrisc/trunk/or1ksim/ChangeLog |
457 |
or1ksim - couple of ethernet peripheral updates, fixup of ethernet regression test so all tests pass again. |
julius |
4976d 03h |
/openrisc/trunk/or1ksim/ChangeLog |
451 |
More tidying up. |
jeremybennett |
4986d 23h |
/openrisc/trunk/or1ksim/ChangeLog |
450 |
Simplified (and hopefully more reliable) Ethernet MAC/PHY. |
jeremybennett |
4987d 02h |
/openrisc/trunk/or1ksim/ChangeLog |
442 |
OR1Ksim - adding trace controlability by SIGUSR1 signal. |
julius |
4992d 21h |
/openrisc/trunk/or1ksim/ChangeLog |
440 |
Updated documentation to describe new Ethernet usage. |
jeremybennett |
4993d 23h |
/openrisc/trunk/or1ksim/ChangeLog |
437 |
Or1ksim - ethernet peripheral update, working much better. |
julius |
5001d 17h |
/openrisc/trunk/or1ksim/ChangeLog |
436 |
Or1ksim ethernet TAP updates. Ethernet test still failing. |
julius |
5002d 17h |
/openrisc/trunk/or1ksim/ChangeLog |
434 |
Work in progress with new Ethernet TUN/TAP interface. |
jeremybennett |
5005d 23h |
/openrisc/trunk/or1ksim/ChangeLog |
432 |
Updates to handle interrupts correctly. |
jeremybennett |
5007d 03h |
/openrisc/trunk/or1ksim/ChangeLog |
430 |
or1ksim - clarifying interrupt behavior in code and documentation. |
julius |
5009d 23h |
/openrisc/trunk/or1ksim/ChangeLog |
429 |
or1ksim update - remove debug printfs from eth MDIO emulation function
and fix illegal instruction vector jump for invalid instructions. |
julius |
5010d 03h |
/openrisc/trunk/or1ksim/ChangeLog |
428 |
or1ksim - adding preliminary PHY emulation to ethernet peripheral. |
julius |
5012d 23h |
/openrisc/trunk/or1ksim/ChangeLog |
420 |
New feature to trace instructions (option --trace). Manual updated to match. |
jeremybennett |
5021d 03h |
/openrisc/trunk/or1ksim/ChangeLog |
418 |
Or1ksim - adding new option when configuring memories, "exitnops" |
julius |
5021d 06h |
/openrisc/trunk/or1ksim/ChangeLog |
387 |
Fixed testing, to always use our DEJAGNU config. |
jeremybennett |
5061d 03h |
/openrisc/trunk/or1ksim/ChangeLog |
385 |
Updates for Or1ksim 0.5.0rc2.
* configure: Regenerated.
* configure.ac: Minor tidy ups. Version changed to 0.5.0rc2.
* debug/rsp-server.c (rsp_query): Simplified handling of
"qTStatus" to indicate we just do not support tracing.
* doc/or1ksim.texi <Configuring the Build>: No longer mandatory to
specify the target.
<Memory Configuration>: Warns about issues with memory controller.
<Memory Controller Configuration>: Warns about issues with memory
controller and advises not to use it.
<Standalone Simulator>: Details for options with arguments updated.
* NEWS: Updated for 0.5.0rc2.
* peripheral/mc.c (mc_poc): Use constant MC_POC_VALID
(mc_index): Ensure value is valid.
* peripheral/mc-defines.h <MC_CE_VALID>: Defined.
* testsuite/test-code-or1k/configure: Regenerated.
* testsuite/test-code-or1k/configure.ac: Handle the case where
target_cpu is not set. Version changed to 0.5.0rc2.
* testsuite/test-code-or1k/support/spr-defs.h <SPR_VR_RES>:
Definition corrected. |
jeremybennett |
5061d 04h |
/openrisc/trunk/or1ksim/ChangeLog |
376 |
Adding handling cases for RSP queries seen from new gdb-7.2 in RSP servers in
or1ksim and or_debug_proxy.
Adding ChangeLog to or_debug_proxy |
julius |
5068d 09h |
/openrisc/trunk/or1ksim/ChangeLog |