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486 Updated with new opcodes to generate random numbers and to identify us as Or1ksim. jeremybennett 4894d 10h /openrisc/trunk/or1ksim/doc/or1ksim.info
472 Various changes which improve the quality of the tracing. jeremybennett 4908d 19h /openrisc/trunk/or1ksim/doc/or1ksim.info
460 Merged in changes from Jeremy to Ethernet, updated documentation of tests, added l.nop 8 and l.nop 9 opcodes to turn tracing on and off. Updated documentation to cover l.nop opcodes. jeremybennett 4916d 17h /openrisc/trunk/or1ksim/doc/or1ksim.info
451 More tidying up. jeremybennett 4937d 07h /openrisc/trunk/or1ksim/doc/or1ksim.info
450 Simplified (and hopefully more reliable) Ethernet MAC/PHY. jeremybennett 4937d 11h /openrisc/trunk/or1ksim/doc/or1ksim.info
442 OR1Ksim - adding trace controlability by SIGUSR1 signal. julius 4943d 06h /openrisc/trunk/or1ksim/doc/or1ksim.info
440 Updated documentation to describe new Ethernet usage. jeremybennett 4944d 07h /openrisc/trunk/or1ksim/doc/or1ksim.info
436 Or1ksim ethernet TAP updates. Ethernet test still failing. julius 4953d 02h /openrisc/trunk/or1ksim/doc/or1ksim.info
434 Work in progress with new Ethernet TUN/TAP interface. jeremybennett 4956d 08h /openrisc/trunk/or1ksim/doc/or1ksim.info
432 Updates to handle interrupts correctly. jeremybennett 4957d 11h /openrisc/trunk/or1ksim/doc/or1ksim.info
430 or1ksim - clarifying interrupt behavior in code and documentation. julius 4960d 08h /openrisc/trunk/or1ksim/doc/or1ksim.info
429 or1ksim update - remove debug printfs from eth MDIO emulation function
and fix illegal instruction vector jump for invalid instructions.
julius 4960d 11h /openrisc/trunk/or1ksim/doc/or1ksim.info
420 New feature to trace instructions (option --trace). Manual updated to match. jeremybennett 4971d 12h /openrisc/trunk/or1ksim/doc/or1ksim.info
418 Or1ksim - adding new option when configuring memories, "exitnops" julius 4971d 15h /openrisc/trunk/or1ksim/doc/or1ksim.info
385 Updates for Or1ksim 0.5.0rc2.

* configure: Regenerated.
* configure.ac: Minor tidy ups. Version changed to 0.5.0rc2.
* debug/rsp-server.c (rsp_query): Simplified handling of
"qTStatus" to indicate we just do not support tracing.
* doc/or1ksim.texi <Configuring the Build>: No longer mandatory to
specify the target.
<Memory Configuration>: Warns about issues with memory controller.
<Memory Controller Configuration>: Warns about issues with memory
controller and advises not to use it.
<Standalone Simulator>: Details for options with arguments updated.
* NEWS: Updated for 0.5.0rc2.
* peripheral/mc.c (mc_poc): Use constant MC_POC_VALID
(mc_index): Ensure value is valid.
* peripheral/mc-defines.h <MC_CE_VALID>: Defined.

* testsuite/test-code-or1k/configure: Regenerated.
* testsuite/test-code-or1k/configure.ac: Handle the case where
target_cpu is not set. Version changed to 0.5.0rc2.
* testsuite/test-code-or1k/support/spr-defs.h <SPR_VR_RES>:
Definition corrected.
jeremybennett 5011d 13h /openrisc/trunk/or1ksim/doc/or1ksim.info
346 Changes to support Or1ksim 0.5.0rc1

Top level changes:

* config.h.in: Regenerated.
* debug.cfg, rsp.cfg: Deleted.
* doc/or1ksim.texi: Updated for new options and library interface.
* doc/or1ksim.info, doc/version.texi: Regenerated.
* Makefile.am: Added sim.cfg to EXTRA_DIST.
* NEWS: Updated for 0.5.0rc1.
* or1ksim.h <enum or1ksim_rc>: OR1KSIM_RC_OK explicitly zero.
* sim.cfg: Updated for consistency with the user guide.
* sim-config.c (init_defconfig): 50000 as default VAPI port.
(alloc_memory_block): Verbose message of amount allocated.
* configure: Regenerated.
* configure.ac: Version changed to 0.5.0rc1.

Changes in testsuite:

* libsim.tests/int-edge.exp <int-edge simple 1>: Increase time
between interrupts to 2ms.
<int-edge simple 2>: Increase time between interrupts to 2ms.
<int-edge duplicated 1>: Increase time between interrupts to 2ms.
<int-edge duplicated 2>: Increase time between interrupts to 2ms.

Changes in testsuite/test-code-or1k:

* mc-common/except-mc.S: Remove leading underscores from global
symbols.
* except/except.S: Remove leading underscores from global symbols.
* cache/cache-asm.S: Remove leading underscores from global symbols.
* cache/cache.c (jump_and_link): Remove leading underscore from
label.
(jump): Remove leading underscore from label.
(all): Remove leading underscore from global symbol references.
* testfloat/systfloat.S: Remove leading underscores from global
symbols.
* mmu/mmu.c (jump): Remove leading underscore from label.
* mmu/mmu-asm.S: Remove leading underscores from global symbols.
* except-test/except-test.c: Remove leading underscores from
global symbols.
* except-test/except-test-s.S: Remove leading underscores from
global symbols.
* uos/except-or32.S: Remove leading underscores from global
symbols.
* configure: Regenerated.
* configure.ac: Version changed to 0.5.0rc1.
jeremybennett 5036d 15h /openrisc/trunk/or1ksim/doc/or1ksim.info
240 or1ksim build fixups for Cygwin copilation julius 5066d 18h /openrisc/trunk/or1ksim/doc/or1ksim.info
236 Terminate execution on NOP_EXIT, even if debugging, add support for RSP qAttached packet, stall in library after single instruction is ST bit is set in SPR DMR1. Fix softfloat to allow compilation with -O0 for debugging.

* configure: Regenerated.
* configure.ac: Version changed to current date. Test for
varargs.h dropped.
* cpu/or32/insnset.c <l_nop>: Terminate execution on NOP_EXIT,
even if debugging.
* debug/rsp-server.c (rsp_query): Added support for qAttached
packet.
* libtoplevel.c (or1ksim_run): Stall after a single instruction if
SPR_DMR1_ST flag is set.
* softfloat/host.h: Make #define of INLINE conditional, to allow
the user to override.
* softfloat/README: Added instructions for non-optimized compilation.
* softfloat/softfloat-macros: Add a conditional #ifndef
NO_SOFTFLOAT_UNUSUED around unused functions.
jeremybennett 5070d 10h /openrisc/trunk/or1ksim/doc/or1ksim.info
235 Removed support for old OpenRISC JTAG Remote Protocol. jeremybennett 5070d 15h /openrisc/trunk/or1ksim/doc/or1ksim.info
234 Minor tidy ups. DOS end of line chars fixed. jeremybennett 5071d 17h /openrisc/trunk/or1ksim/doc/or1ksim.info
233 New softfloat FPU and testfloat sw for or1ksim julius 5072d 03h /openrisc/trunk/or1ksim/doc/or1ksim.info
230 Changed library interface. Fixed namespace problems with instruction lookup in library.

* configure: Regenerated.
* configure.ac: Version changed to current date.
* cpu/or1k/opcode/or32.h <or1ksim_build_automata>: Renamed from
build_automata.
<l_none, num_opcodes, insn_index>: Deleted.
<or1ksim_op_start>: Renamed from op_start.
<or1ksim_automata>: Renamed from automata.
<or1ksim_ti>: Renamed from ti.
<or1ksim_or32_opcodes>: Renamed from or32_opcodes.
<or1ksim_disassembled>: Renamed from disassembled.
<or1ksim_insn_len>: Renamed from insn_len.
<or1ksim_insn_name>: Renamed from insn_name.
<or1ksim_destruct_automata>: Renamed from destruct_automata.
<or1ksim_insn_decode>: Renamed from insn_decode.
<or1ksim_disassemble_insn>: Renamed from disassemble_insn.
<or1ksim_disassemble_index>: Renamed from disassemble_index.
<or1ksim_extend_imm>: Renamed from extend_imm.
<or1ksim_or32_extract>: Renamed from or32_extract
* cpu/or32/or32.c, cpu/or32/execute.c, cpu/or32/generate.c,
* cpu/common/stats.c, cpu/common/abstract.c, cpu/common/parse.c,
* cpu/or1k/opcode/or32.h, cuc/load.c, cuc/cuc.c,
* support/dumpverilog.c, toplevel-support.c: Renaming
corresponding to changes in cpu/or1k/opcode/or32.h.
* cpu/or32/execute-fp.h: Deleted
* cpu/or32/generate.c <include_strings>: Remove reference to
execute-fp.h
* cpu/or32/execute.c <host_fp_rm>: Declared static.
(fp_set_flags_restore_host_rm, fp_set_or1k_rm): Declared static,
forward declaration removed.
* or1ksim.h (or1ksim_read_mem, or1ksim_write_mem): addr arg
changed to unsigned long int.
(or1ksim_read_spr): sprval_ptr arg changed to unsigned long int *.
(or1ksim_write_spr): sprval arg changed to unsigned long int.
(or1ksim_read_reg): regval_ptr arg changed to unsigned long int *.
(or1ksim_write_reg): regval arg changed to unsigned long int.
* libtoplevel.c (or1ksim_read_mem, or1ksim_write_mem): addr arg
changed to unsigned long int.
(or1ksim_read_spr): sprval_ptr arg changed to unsigned long int *.
(or1ksim_write_spr): sprval arg changed to unsigned long int.
(or1ksim_read_reg): regval_ptr arg changed to unsigned long int *.
(or1ksim_write_reg): regval arg changed to unsigned long int.
jeremybennett 5073d 08h /openrisc/trunk/or1ksim/doc/or1ksim.info
226 Orksim floating point support additions, spr-defs.h updates, newlib cache init routines updated julius 5075d 09h /openrisc/trunk/or1ksim/doc/or1ksim.info
224 Add new library functions and modify existing ones. Change the parameter type enumarations to upper case. New (simplified and corrected) config file parsing. No include files or default sim.cfg. jeremybennett 5075d 16h /openrisc/trunk/or1ksim/doc/or1ksim.info
220 Updated library interface to take a full command line (this will break all old code). Added -q/--quiet and --report-memory-errors flags to command line. Fixed all tests to match this. jeremybennett 5082d 08h /openrisc/trunk/or1ksim/doc/or1ksim.info
202 Adding executed log in binary format capability to or1ksim julius 5088d 12h /openrisc/trunk/or1ksim/doc/or1ksim.info
143 Fix building for Cygwin with GCC 3.4.4 (Bug 1797). Fix breakpoints with instruction cache enabled (Bug 195). jeremybennett 5105d 12h /openrisc/trunk/or1ksim/doc/or1ksim.info
134 Updates for stable release 0.4.0 jeremybennett 5113d 16h /openrisc/trunk/or1ksim/doc/or1ksim.info
127 New config option to allow l.xori with unsigned operand. jeremybennett 5119d 13h /openrisc/trunk/or1ksim/doc/or1ksim.info
124 Overflow handling now in line with architecture manual. Tests added. jeremybennett 5120d 08h /openrisc/trunk/or1ksim/doc/or1ksim.info

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