| Rev |
Log message |
Author |
Age |
Path |
| 544 |
ORPSoC ordb1a3pe1500 update - adding SD card controller. |
julius |
4820d 03h |
/openrisc/trunk/orpsocv2 |
| 543 |
i2c_master_slave bug fix for slave, potentially holding SDA low when master wants to send stop. |
julius |
4820d 03h |
/openrisc/trunk/orpsocv2 |
| 542 |
ORPSoC scripts cleanup. Now centralised.
Documentation updated for ml501's SPI programming, noting issues with ISE12. |
julius |
4825d 17h |
/openrisc/trunk/orpsocv2 |
| 537 |
ORPSoC or1200 fix for l.rfe bug, and when multiply is disabled. |
julius |
4836d 14h |
/openrisc/trunk/orpsocv2 |
| 536 |
ORPSoC - removing duplicate ethmac toplevel file. |
julius |
4840d 04h |
/openrisc/trunk/orpsocv2 |
| 535 |
ORPSoC - adding sw tests for l.rfe |
julius |
4841d 18h |
/openrisc/trunk/orpsocv2 |
| 530 |
ORPSoC update
Ethernet MAC Wishbone interface fixes
Beginnings of software update.
ML501 backend script fixes for new ISE |
julius |
4849d 03h |
/openrisc/trunk/orpsocv2 |
| 528 |
ORPSoC SPI flash programming link script bug fix |
julius |
4854d 03h |
/openrisc/trunk/orpsocv2 |
| 506 |
ORPSoC or1200 interrupt and syscall generation test |
julius |
4874d 21h |
/openrisc/trunk/orpsocv2 |
| 505 |
OR1200 overflow detection fixup
SPIflash program update
or1200 driver library timer improvement |
julius |
4874d 22h |
/openrisc/trunk/orpsocv2 |
| 504 |
ORPSoC ALU update with new comparison configuration option, software test for comparisons and register file comment cleanup |
julius |
4891d 17h |
/openrisc/trunk/orpsocv2 |
| 503 |
ORPSoC's or1200 defines fix to indicate we don't actually have I/DMMU invalidate registers. |
julius |
4892d 13h |
/openrisc/trunk/orpsocv2 |
| 502 |
ORPSoC update - or1200, ethmac Xilinx fifos
or1200 in ORPSoC has carry bit, overflow bit, and range exception added and tested. New software tests in ORPSoC library. Ml501 build had ethmac fifos added, and or1200_defines updated to use these new or1200 features by default |
julius |
4894d 17h |
/openrisc/trunk/orpsocv2 |
| 501 |
ORPSoC or1200 mult/mac/divide unit serial arith bug fixed.
ORPSoC or1200 defines now use serial divide by default |
julius |
4895d 18h |
/openrisc/trunk/orpsocv2 |
| 500 |
ORPSoC's System C UART model can now accept input from stdin during simulation to drive consoles etc
ML501 simulation makefile update to allow custom ELFs to be specified |
julius |
4895d 21h |
/openrisc/trunk/orpsocv2 |
| 499 |
ORPSoC OR1200 updates - added l.ext instructions with tests, ammended some MAC bugs, decode stage cleanup |
julius |
4896d 14h |
/openrisc/trunk/orpsocv2 |
| 496 |
ORPSoC ml501 updates - increased frequency, updated documentation |
julius |
4899d 00h |
/openrisc/trunk/orpsocv2 |
| 495 |
ORPSoC adding more accessor functions to Micron SDRAM model. |
julius |
4899d 01h |
/openrisc/trunk/orpsocv2 |
| 493 |
ORPSoC VPI JTAG interface, hopefully fix 64-bit machine compile issues. |
julius |
4912d 02h |
/openrisc/trunk/orpsocv2 |
| 492 |
ORPSoC VPI interface for modelsim and documentation update |
julius |
4913d 01h |
/openrisc/trunk/orpsocv2 |
| 491 |
ORPSoC or1200_monitor update. |
julius |
4913d 11h |
/openrisc/trunk/orpsocv2 |
| 489 |
ORPSoC sw cleanup. Remove warnings. |
julius |
4923d 00h |
/openrisc/trunk/orpsocv2 |
| 488 |
ORPSoC OR1200 driver - tick timer exception handler reverted to generic - cpu tick function hook used as default in handler table. OR1200 timer demo sw for board added. |
julius |
4923d 00h |
/openrisc/trunk/orpsocv2 |
| 487 |
ORPSoC main software makefile update |
julius |
4925d 22h |
/openrisc/trunk/orpsocv2 |
| 486 |
ORPSoC updates, mainly software, i2c driver |
julius |
4925d 22h |
/openrisc/trunk/orpsocv2 |
| 485 |
ORPSoC updates - or1200 monitor now has separate defines file, ethmac updates to fifos and wishbone IF, board.h changes for UART (may propegate to other drivers with multiple cores, we'll see), crt0.S for or1200 now zeros all registers on reset, adding own ethernet tests for ML501 |
julius |
4930d 03h |
/openrisc/trunk/orpsocv2 |
| 480 |
ORPSoC updates - ml501 project cleanups, DDR2 cache bug fixes. |
julius |
4947d 07h |
/openrisc/trunk/orpsocv2 |
| 479 |
ORPSoC update to ml501 board port. Memory controller caching fixed up, does multiple lines of cache and Wishbone bursting. |
julius |
4948d 07h |
/openrisc/trunk/orpsocv2 |
| 478 |
ORPSoC update - ml501 or1200 cache configuration set to maximum, some cleanups. |
julius |
4949d 22h |
/openrisc/trunk/orpsocv2 |
| 477 |
ORPSoC update - Added ability to enable OR1200 caches up to 32KB, which requires line size of 32bytes and 8-beat Wishbone bursts.
Changed cache sizes of both instruction and data cache of reference design to 4kB each. |
julius |
4950d 06h |
/openrisc/trunk/orpsocv2 |
