OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc] - Rev 518

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
518 Missing parts of checkin from revision 515. Version now 1.0rc4. julius 4876d 12h /openrisc
517 newlib updates with or1k support functions, libgloss cleanup julius 4877d 06h /openrisc
516 Tagging the 1.0rc3 release of GCC 4.5.1 for the OpenRISC 1000 jeremybennett 4877d 12h /openrisc
515 Minor synch with recent changes by Joern. jeremybennett 4877d 12h /openrisc
514 Changes for version 1.0rc3 for OpenRISC 1000. Various bugs and tests fixed. jeremybennett 4877d 15h /openrisc
513 Tagging the 1.0rc3 release of GDB 7.2 for the OpenRISC 1000 jeremybennett 4877d 18h /openrisc
512 Updates for release 1.0rc3 for the OpenRISC 1000. jeremybennett 4877d 18h /openrisc
511 Tagging the 0.5.1rc1 release of Or1ksim jeremybennett 4878d 17h /openrisc
510 Updates for release 0.5.1rc1. jeremybennett 4878d 17h /openrisc
509 Tagging the 0.5.0rc3 release of Or1ksim jeremybennett 4878d 18h /openrisc
508 Updates for Or1ksim 0.5.0rc3. jeremybennett 4879d 17h /openrisc
507 Newlib libgloss board support update. Corresponding GCC port changes to support it. julius 4885d 14h /openrisc
506 ORPSoC or1200 interrupt and syscall generation test julius 4886d 13h /openrisc
505 OR1200 overflow detection fixup

SPIflash program update

or1200 driver library timer improvement
julius 4886d 14h /openrisc
504 ORPSoC ALU update with new comparison configuration option, software test for comparisons and register file comment cleanup julius 4903d 10h /openrisc
503 ORPSoC's or1200 defines fix to indicate we don't actually have I/DMMU invalidate registers. julius 4904d 06h /openrisc
502 ORPSoC update - or1200, ethmac Xilinx fifos
or1200 in ORPSoC has carry bit, overflow bit, and range exception added and tested. New software tests in ORPSoC library. Ml501 build had ethmac fifos added, and or1200_defines updated to use these new or1200 features by default
julius 4906d 10h /openrisc
501 ORPSoC or1200 mult/mac/divide unit serial arith bug fixed.
ORPSoC or1200 defines now use serial divide by default
julius 4907d 10h /openrisc
500 ORPSoC's System C UART model can now accept input from stdin during simulation to drive consoles etc

ML501 simulation makefile update to allow custom ELFs to be specified
julius 4907d 13h /openrisc
499 ORPSoC OR1200 updates - added l.ext instructions with tests, ammended some MAC bugs, decode stage cleanup julius 4908d 06h /openrisc
498 or_debug_proxy updates to documentation and Makefile related to latest ftd2xx driver, julius 4909d 19h /openrisc
497 or_debug_proxy updates julius 4910d 15h /openrisc
496 ORPSoC ml501 updates - increased frequency, updated documentation julius 4910d 17h /openrisc
495 ORPSoC adding more accessor functions to Micron SDRAM model. julius 4910d 17h /openrisc
494 Change to ensure handles ctrl-C correctly with empty line. jeremybennett 4921d 10h /openrisc
493 ORPSoC VPI JTAG interface, hopefully fix 64-bit machine compile issues. julius 4923d 19h /openrisc
492 ORPSoC VPI interface for modelsim and documentation update julius 4924d 17h /openrisc
491 ORPSoC or1200_monitor update. julius 4925d 04h /openrisc
490 Updates to fix spurious test failures and register scheduling. jeremybennett 4929d 09h /openrisc
489 ORPSoC sw cleanup. Remove warnings. julius 4934d 16h /openrisc

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.