| Rev |
Log message |
Author |
Age |
Path |
| 60 |
Mark Jarvin's patches to support Mac OS X (Snow Leopard). |
jeremybennett |
5307d 06h |
/openrisc |
| 59 |
Toolchain install script gcc patch change and gdb configure change |
julius |
5328d 07h |
/openrisc |
| 58 |
ORPSoC2 update - added fpu and implemented in processor, also some sw tests for it, makefile for event sims cleaned up |
julius |
5331d 05h |
/openrisc |
| 57 |
ORPSoC execution logs created by event sim and cycle accurate should now be equivalent. Changed some of the rule names in orpsoc main makefile to make all rules use hyphens instead of underscores between words |
julius |
5336d 09h |
/openrisc |
| 56 |
adding generic pll model to orpsoc |
julius |
5344d 11h |
/openrisc |
| 55 |
Added modelsim support to makefile. Moved buffer libraries to sensible place. Removed a lot of junk |
julius |
5347d 02h |
/openrisc |
| 54 |
wb_conbus wishbone arbiter now in orpsocv2 instead of synthesized netlist |
julius |
5357d 09h |
/openrisc |
| 53 |
Fixed incorrect commandline option for ORPSoC and main makefile setting |
julius |
5375d 09h |
/openrisc |
| 52 |
ORPSoC update - ability to dump part or all of SRAM contents at the end of simulation |
julius |
5376d 05h |
/openrisc |
| 51 |
ORPSoCv2 updates: cycle accurate profiling, ELF loading |
julius |
5390d 08h |
/openrisc |
| 50 |
Adding or32_funcs.S |
julius |
5390d 12h |
/openrisc |
| 49 |
Lots of ORPSoC Updates. Cycle accurate model update. Enabled block read from CPU via debug interface. SMII interface same as devboard but may be broken in sim now. Makefile update |
julius |
5409d 02h |
/openrisc |
| 48 |
Adds an initialization to keep GCC happy in jp1_ll_read_jp1. |
jeremybennett |
5409d 05h |
/openrisc |
| 47 |
debug proxy speed increase, block transfers possible with cpu aslong as dbg_interface has appropriate change, usb chip reinit function, changed some of the retry code in the usb transfer functions |
julius |
5418d 12h |
/openrisc |
| 46 |
debug interfaces now support byte and non-aligned accesses from gdb |
julius |
5424d 13h |
/openrisc |
| 45 |
Orpsoc eth test fix and script error message update |
julius |
5431d 12h |
/openrisc |
| 44 |
New SystemC model monitoring functions, ethernet PHY model and test sw, smii decoder for ethernet PHY, various makefile upgrades |
julius |
5460d 12h |
/openrisc |
| 43 |
Couple of fixes to ORPSoC, new linux patch version in toolchain script |
julius |
5484d 09h |
/openrisc |
| 42 |
Fixed ORPSoCv2 VCD dumping and UART output in cycleaccurate model |
julius |
5500d 06h |
/openrisc |
| 41 |
Update to or1k top |
julius |
5503d 07h |
/openrisc |
| 40 |
Added GDB server to verilog simulation via VPI and make target to build and run this model |
julius |
5504d 13h |
/openrisc |
| 39 |
Adding OR debug proxy a makefile tweak for uClibc and toolchain install script update |
julius |
5508d 13h |
/openrisc |
| 38 |
Adding binutils, gcc, uClibc patched source and patches |
julius |
5518d 12h |
/openrisc |
| 37 |
Update to the toolchain script - uses gcc-core package now instead of complete gcc |
julius |
5518d 13h |
/openrisc |
| 36 |
Better clean rule in makefile |
julius |
5518d 13h |
/openrisc |
| 35 |
Download and patch files with README files updated to explain what is in the new repository |
jeremybennett |
5519d 07h |
/openrisc |
| 34 |
Created directories for download and patch files and added README's explaining what is in each one. |
jeremybennett |
5519d 07h |
/openrisc |
| 33 |
version 2.1 of GDB 6.8 for the OpenRISC architecture |
jeremybennett |
5519d 07h |
/openrisc |
| 32 |
Tags directory for versions of GDB 6.8 |
jeremybennett |
5519d 07h |
/openrisc |
| 31 |
Tags directory for all GDB versions |
jeremybennett |
5519d 07h |
/openrisc |
