OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc] - Rev 190

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
190 Allow the Or1ksim installation directory to be set by option. jeremybennett 5116d 16h /openrisc
189 Fuller explanation of the build script given. jeremybennett 5116d 16h /openrisc
188 More rigorous testing of options. jeremybennett 5116d 17h /openrisc
187 Or1200 sprs FPU update julius 5118d 10h /openrisc
186 OR1200 RTL FPU fix - RF writeback signal working properly again julius 5118d 13h /openrisc
185 Adding single precision FPU to or1200, initial checkin, not fully tested yet julius 5118d 14h /openrisc
184 Fix the UART version of newlib. jeremybennett 5119d 18h /openrisc
183 Fix to setjmp, so it works. Some commenting tidy ups elsewhere. jeremybennett 5120d 10h /openrisc
182 Removed redundant code. jeremybennett 5120d 10h /openrisc
181 Updated, so only GCC tries to use parallel build. Redundant target for libgcc removed. jeremybennett 5120d 13h /openrisc
180 Rewritten to use namespace clean BSP in libgloss. Two versions of the library, one with, one without using the UART. jeremybennett 5120d 13h /openrisc
179 Code is now loaded from address 0, with section .vectors loaded before any other section. This provides a convenient mechanism for setting up the OR1K exception vectors. jeremybennett 5120d 13h /openrisc
178 Fixes a bug in prologue recognition without frame pointer. jeremybennett 5120d 13h /openrisc
177 Specified CPU type for or32, corrected templates for or32-*-elf*. Corrected specs in or32.h, added init and fini. Added support for newlib, including -mor32-newlib and -mor32-newlib-uart options. jeremybennett 5120d 13h /openrisc
176 Removing empty and redundant directory. jeremybennett 5125d 14h /openrisc
175 Moved orpmon into bootloaders julius 5125d 14h /openrisc
174 Consolidating all RTOS ports in one directory. jeremybennett 5125d 15h /openrisc
173 Consolidating all RTOS ports in one directory. jeremybennett 5125d 15h /openrisc
172 Information about this directory. jeremybennett 5125d 15h /openrisc
171 A new directory for ports of real time operating systems. jeremybennett 5125d 15h /openrisc
170 More detailed instructions. jeremybennett 5125d 16h /openrisc
169 Script to build entire tool chain and library from unified source tree. jeremybennett 5125d 16h /openrisc
168 Removing, since all relevant content has been moved to the unified GNU source and patches directories. jeremybennett 5125d 16h /openrisc
167 Moving to unified patches directory. jeremybennett 5125d 16h /openrisc
166 Removed. uClibc now obsolete. All other contents moved to unified GNU source and patches trees. jeremybennett 5125d 16h /openrisc
165 Moving to unified patches directory. jeremybennett 5125d 16h /openrisc
164 Added to the distribution. Even though compiled, it is part of the GNU standard distributioAdded to the distribution. Even though compiled, it is part of the GNU standard distributionn jeremybennett 5125d 16h /openrisc
163 All patches now in unified patch directory. jeremybennett 5125d 16h /openrisc
162 Moving all GNU patches into a unified directory. jeremybennett 5125d 16h /openrisc
161 Explanation of this directory. jeremybennett 5125d 16h /openrisc

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.