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[/] [or1k/] [branches/] [stable_0_2_x/] - Rev 1623

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1623 First Import of uClinux for RC20x board jcastillo 6814d 09h /or1k/branches/stable_0_2_x
1622 First Import of uClinux for RC20x board jcastillo 6814d 09h /or1k/branches/stable_0_2_x
1621 First Impot jcastillo 6814d 10h /or1k/branches/stable_0_2_x
1620 Added SMC91C111 LAN Chip Interruption to work with uClinux jcastillo 6819d 06h /or1k/branches/stable_0_2_x
1619 Fixed types in function declaration jcastillo 6819d 11h /or1k/branches/stable_0_2_x
1618 Import of or32 sepcific part of binutils port updated by Balint and Nog phoenix 6819d 18h /or1k/branches/stable_0_2_x
1617 *** empty log message *** phoenix 6819d 18h /or1k/branches/stable_0_2_x
1616 Import of or32 sepcific part of binutils port updated by Balint and Nog phoenix 6819d 18h /or1k/branches/stable_0_2_x
1615 *** empty log message *** phoenix 6819d 18h /or1k/branches/stable_0_2_x
1614 CI should not be set in dMMU translation tables or one gets different behaviour with dMMU on or off in case data cache is enabled. care should be taken for addresses higher than 0x7fff_ffff where the situation is just reversed. (since or1200 does not cache upper half of address space if there is no dMMU) phoenix 6829d 18h /or1k/branches/stable_0_2_x
1613 change default phoenix 6835d 04h /or1k/branches/stable_0_2_x
1612 major optimizations for or32 target phoenix 6835d 04h /or1k/branches/stable_0_2_x
1610 Update ChangeLog nogj 6838d 05h /or1k/branches/stable_0_2_x
1609 0.2.0-rc2 release nogj 6838d 06h /or1k/branches/stable_0_2_x
1608 Avoid scheduleing too many jobs, potentially underflowing the scheduler stack nogj 6839d 00h /or1k/branches/stable_0_2_x
1607 Don't drop cycles from the scheduler nogj 6839d 00h /or1k/branches/stable_0_2_x
1606 fix uninitialized reads phoenix 6839d 05h /or1k/branches/stable_0_2_x
1605 Execute l.ff1 instruction nogj 6846d 01h /or1k/branches/stable_0_2_x
1604 Fix dumphex/dumpverilog to not do unaligned memory access nogj 6846d 01h /or1k/branches/stable_0_2_x
1603 Accept EM_OPENRISC as a valid machine nogj 6847d 05h /or1k/branches/stable_0_2_x
1602 Corrected description of l.sfXXui (arch manual had a wrong description compared to behavior implemented in or1ksim/gcc/or1200). Removed Atomicity chapter. lampret 6848d 03h /or1k/branches/stable_0_2_x
1601 fixed description of l.sfXXXi lampret 6848d 03h /or1k/branches/stable_0_2_x
1600 Corrected mistake in pin assignation due to typo error in RC203 manual jcastillo 6856d 04h /or1k/branches/stable_0_2_x
1599 Corrected Syn Script to add MMU memories jcastillo 6856d 11h /or1k/branches/stable_0_2_x
1598 Handle ethernet addresses as an address and not as an int nogj 6858d 02h /or1k/branches/stable_0_2_x
1597 Fix parsing the destination register nogj 6858d 02h /or1k/branches/stable_0_2_x
1596 Fix handling of eof in the sim cli nogj 6858d 02h /or1k/branches/stable_0_2_x
1595 Add default immu/dmmu page size nogj 6858d 03h /or1k/branches/stable_0_2_x
1594 Fix the case of is_power2(0) nogj 6858d 03h /or1k/branches/stable_0_2_x
1593 Don't kill sim on second ctrl+c if the cli prompt has already been shown nogj 6858d 03h /or1k/branches/stable_0_2_x

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