OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [before_ORP] - Rev 797

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
797 Changed hardcoded address for fake MC to use a define. lampret 8143d 22h /or1k/tags/before_ORP
796 Removed unused ports wb_clki and wb_rst_i lampret 8143d 22h /or1k/tags/before_ORP
795 Added a directive to ignore signed division variables that are only used in simulation. lampret 8144d 02h /or1k/tags/before_ORP
794 Added again just recently removed full_case directive lampret 8144d 02h /or1k/tags/before_ORP
793 Added synthesis off/on for timescale.v included file. lampret 8144d 02h /or1k/tags/before_ORP
792 Fixed port names that changed. lampret 8144d 02h /or1k/tags/before_ORP
791 Fixed some ports in instnatiations that were removed from the modules lampret 8144d 02h /or1k/tags/before_ORP
790 Changed comment about synopsys to _synopsys_ because synthesis was complaining about unknown directives lampret 8144d 02h /or1k/tags/before_ORP
789 Added response from memory controller (addr 0x60000000) lampret 8144d 03h /or1k/tags/before_ORP
788 Some of the warnings fixed. lampret 8144d 03h /or1k/tags/before_ORP
787 Added romfs.tgz lampret 8144d 22h /or1k/tags/before_ORP
786 Moved UCF constraint file to the backend directory. lampret 8144d 22h /or1k/tags/before_ORP
785 Added XSV specific documentation. lampret 8144d 22h /or1k/tags/before_ORP
784 Added soem missing files. lampret 8144d 22h /or1k/tags/before_ORP
783 Added sim directory and sub files/dirs. lampret 8144d 22h /or1k/tags/before_ORP
782 Added the old SW directory. It needs to be updated for the new ORP environment and test cases moved to sw directory. lampret 8144d 22h /or1k/tags/before_ORP
781 Added design compiler scripts. However these are not ready for use yet .... They need to be updated for the ORP sources and ORP sources need to be updated as well. lampret 8144d 22h /or1k/tags/before_ORP
780 Added libraries. lampret 8144d 22h /or1k/tags/before_ORP
779 Added bench directory lampret 8144d 23h /or1k/tags/before_ORP
778 Added second type of Virtual Silicon two-port SRAM (for register file). Changed defines for VS STP RAMs. lampret 8144d 23h /or1k/tags/before_ORP
777 Changed define name from OR1200_MEM2REG_FAST to OR1200_IMPL_MEM2REG2 lampret 8144d 23h /or1k/tags/before_ORP
776 Updated defines. lampret 8144d 23h /or1k/tags/before_ORP
775 Optimized cache controller FSM. lampret 8144d 23h /or1k/tags/before_ORP
774 Removed old files. lampret 8145d 00h /or1k/tags/before_ORP
773 Changing directory structure ... lampret 8145d 01h /or1k/tags/before_ORP
772 Changing directory structure ... lampret 8145d 01h /or1k/tags/before_ORP
771 Added Makefile that is used to convert linux binary to loadable file for XSV board lampret 8146d 00h /or1k/tags/before_ORP
770 Maze application added. Mouse driver changed. simons 8146d 18h /or1k/tags/before_ORP
768 This commit was generated by cvs2svn to compensate for changes in r767,
which included commits to RCS files with non-trunk default branches.
lampret 8146d 22h /or1k/tags/before_ORP
766 Color bits position changed. simons 8147d 03h /or1k/tags/before_ORP

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.