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[/] [or1k/] [tags/] [nog_patch_47/] [or1ksim/] [cpu/] [common/] [abstract.c] - Rev 1782

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1765 root 5587d 09h /or1k/tags/nog_patch_47/or1ksim/cpu/common/abstract.c
1419 This commit was manufactured by cvs2svn to create tag 'nog_patch_47'. 7027d 16h /or1k/tags/nog_patch_47/or1ksim/cpu/common/abstract.c
1386 Rework exception handling nogj 7033d 19h /or1k/tags/nog_patch_47/or1ksim/cpu/common/abstract.c
1375 Remove FAST_SIM, it nolonger provides a speed up nogj 7068d 11h /or1k/tags/nog_patch_47/or1ksim/cpu/common/abstract.c
1362 initialise dev_mem->chip_select in register_memory nogj 7068d 11h /or1k/tags/nog_patch_47/or1ksim/cpu/common/abstract.c
1359 Pass private data in readfunc/writefunc callbacks nogj 7068d 11h /or1k/tags/nog_patch_47/or1ksim/cpu/common/abstract.c
1358 Modularise config file parseing. Paving the way for further modularisation. nogj 7068d 11h /or1k/tags/nog_patch_47/or1ksim/cpu/common/abstract.c
1354 typing fixes phoenix 7076d 17h /or1k/tags/nog_patch_47/or1ksim/cpu/common/abstract.c
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7077d 14h /or1k/tags/nog_patch_47/or1ksim/cpu/common/abstract.c
1344 * Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes nogj 7090d 18h /or1k/tags/nog_patch_47/or1ksim/cpu/common/abstract.c
1324 memory access functions fixes phoenix 7188d 09h /or1k/tags/nog_patch_47/or1ksim/cpu/common/abstract.c
1319 cpu/sim memory accesses separation, tick, exception, nr. of operands, cycles count,... corrections. phoenix 7194d 09h /or1k/tags/nog_patch_47/or1ksim/cpu/common/abstract.c
1308 Gyorgy Jeney: extensive cleanup phoenix 7282d 09h /or1k/tags/nog_patch_47/or1ksim/cpu/common/abstract.c
1244 Added "cm" command to copy data inside memory.
Make or1ksim work on little endian platforms.
Port to Mac OS X.
Some bugfixes.
Allow JTAG write access to read-only memory regions.
hpanther 7449d 17h /or1k/tags/nog_patch_47/or1ksim/cpu/common/abstract.c
1240 additional functions to bypass cache and mmu needed for peripheral devices phoenix 7454d 04h /or1k/tags/nog_patch_47/or1ksim/cpu/common/abstract.c
1218 segfault when there is no memory context fix phoenix 7502d 06h /or1k/tags/nog_patch_47/or1ksim/cpu/common/abstract.c
997 PRINTF should be used instead of printf; command redirection repaired markom 7978d 23h /or1k/tags/nog_patch_47/or1ksim/cpu/common/abstract.c
992 A bug when cache enabled and bus error comes fixed. simons 7980d 15h /or1k/tags/nog_patch_47/or1ksim/cpu/common/abstract.c
970 Testbench is now running on ORP architecture platform. simons 7986d 10h /or1k/tags/nog_patch_47/or1ksim/cpu/common/abstract.c
897 improved CUC GUI; pre/unroll bugs fixed markom 8015d 15h /or1k/tags/nog_patch_47/or1ksim/cpu/common/abstract.c
884 code cleaning - a lot of global variables moved to runtime struct markom 8022d 21h /or1k/tags/nog_patch_47/or1ksim/cpu/common/abstract.c
882 Routine for adjusting read and write delay for devices added. simons 8025d 19h /or1k/tags/nog_patch_47/or1ksim/cpu/common/abstract.c
860 Added delayr and delayw variable initialization (default value 1) ivang 8070d 09h /or1k/tags/nog_patch_47/or1ksim/cpu/common/abstract.c
638 TLBTR CI bit is now working properly. simons 8181d 11h /or1k/tags/nog_patch_47/or1ksim/cpu/common/abstract.c
631 Real cache access is simulated now. simons 8184d 10h /or1k/tags/nog_patch_47/or1ksim/cpu/common/abstract.c
611 EEAR register is not changed by trap, sys, int, tick and range exception. simons 8191d 00h /or1k/tags/nog_patch_47/or1ksim/cpu/common/abstract.c
599 No more low/high priority interrupts (PICPR removed). Added tick timer exception. simons 8194d 09h /or1k/tags/nog_patch_47/or1ksim/cpu/common/abstract.c
587 gdb messages disabled markom 8196d 16h /or1k/tags/nog_patch_47/or1ksim/cpu/common/abstract.c
574 fixed some tests to work markom 8198d 22h /or1k/tags/nog_patch_47/or1ksim/cpu/common/abstract.c
572 Some new bugs fixed. simons 8199d 11h /or1k/tags/nog_patch_47/or1ksim/cpu/common/abstract.c

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