OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_50/] [or1ksim/] - Rev 1367

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
1367 Cleanup uart peripheral useing the new callback mechanism nogj 7071d 20h /or1k/tags/nog_patch_50/or1ksim
1366 Pass a caller given pointer to the vapi_read callback nogj 7071d 20h /or1k/tags/nog_patch_50/or1ksim
1365 Pass a pointer as the user given argument in the schedular callback nogj 7071d 20h /or1k/tags/nog_patch_50/or1ksim
1364 Clean up the ata peripheral useing the new set of callbacks nogj 7071d 20h /or1k/tags/nog_patch_50/or1ksim
1363 Add status callback nogj 7071d 20h /or1k/tags/nog_patch_50/or1ksim
1362 initialise dev_mem->chip_select in register_memory nogj 7071d 20h /or1k/tags/nog_patch_50/or1ksim
1361 Cleanup test peripheral nogj 7071d 20h /or1k/tags/nog_patch_50/or1ksim
1360 Add dynamic hooks to sim_reset nogj 7071d 20h /or1k/tags/nog_patch_50/or1ksim
1359 Pass private data in readfunc/writefunc callbacks nogj 7071d 20h /or1k/tags/nog_patch_50/or1ksim
1358 Modularise config file parseing. Paving the way for further modularisation. nogj 7071d 20h /or1k/tags/nog_patch_50/or1ksim
1355 Fix dmatest testcase nogj 7079d 07h /or1k/tags/nog_patch_50/or1ksim
1354 typing fixes phoenix 7080d 02h /or1k/tags/nog_patch_50/or1ksim
1353 Modularise simulator command parsing nogj 7080d 23h /or1k/tags/nog_patch_50/or1ksim
1352 Optimise execution history tracking nogj 7080d 23h /or1k/tags/nog_patch_50/or1ksim
1351 Reindent create_watchpoints useing a more compact indentation style nogj 7080d 23h /or1k/tags/nog_patch_50/or1ksim
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7080d 23h /or1k/tags/nog_patch_50/or1ksim
1347 Remove backup file nogj 7092d 10h /or1k/tags/nog_patch_50/or1ksim
1346 Remove the global op structure nogj 7094d 03h /or1k/tags/nog_patch_50/or1ksim
1345 Fix out-of-tree builds nogj 7094d 03h /or1k/tags/nog_patch_50/or1ksim
1344 * Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes nogj 7094d 03h /or1k/tags/nog_patch_50/or1ksim
1343 * Fix warnings in insnset.c and execute.c nogj 7094d 03h /or1k/tags/nog_patch_50/or1ksim
1342 * Fix generate.c to produce a execgen.c with less warnings.
* Fix the --enable-simple configure option.
nogj 7094d 03h /or1k/tags/nog_patch_50/or1ksim
1341 Mark wich operand is the destination operand in the architechture definition nogj 7094d 04h /or1k/tags/nog_patch_50/or1ksim
1338 l.ff1 instruction added andreje 7110d 01h /or1k/tags/nog_patch_50/or1ksim
1332 gcc 3.4.3 compile fix phoenix 7128d 20h /or1k/tags/nog_patch_50/or1ksim
1324 memory access functions fixes phoenix 7191d 19h /or1k/tags/nog_patch_50/or1ksim
1323 Adrian Wise: or1ksim bugfix & Solaris build phoenix 7193d 01h /or1k/tags/nog_patch_50/or1ksim
1321 some tests rely on exit(0) as a last std output text to pass phoenix 7195d 18h /or1k/tags/nog_patch_50/or1ksim
1320 cpu/sim memory accesses separation, tick, exception, nr. of operands, cycles count,... corrections. phoenix 7197d 18h /or1k/tags/nog_patch_50/or1ksim
1319 cpu/sim memory accesses separation, tick, exception, nr. of operands, cycles count,... corrections. phoenix 7197d 18h /or1k/tags/nog_patch_50/or1ksim

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.