OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_50] - Rev 213

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
213 Added test5 for DMA erez 8349d 06h /or1k/tags/nog_patch_50
212 Added DMA erez 8349d 06h /or1k/tags/nog_patch_50
211 Added check for "long long" erez 8349d 06h /or1k/tags/nog_patch_50
210 Updated debug. More cleanup. Added MAC. lampret 8352d 12h /or1k/tags/nog_patch_50
209 Update debug. lampret 8354d 17h /or1k/tags/nog_patch_50
208 Initial checkin with working port to or1k chris 8356d 04h /or1k/tags/nog_patch_50
207 Several major changes to allow gdb to work with an Or1k implementation
that does not need a writeable PC. This version will use the breakpoint
vector and install a new vector into the EPC register, and then single
step out of the breakpoint exception. The breakpoint exception vector
must include only 2 commands: l.rfe and l.nop. Anything else and this
gdb version will fail w/ or1ksim.		 chris 8356d 08h /or1k/tags/nog_patch_50
206 Several modifications to support gdb in a new exception style mode.
This new version works with gdb, and does not require the simulator
to implement a writeable PC.		 chris 8356d 08h /or1k/tags/nog_patch_50
205 Adding debug capabilities. Half done. lampret 8360d 11h /or1k/tags/nog_patch_50
204 Added function prototypes to stop gcc from complaining erez 8363d 03h /or1k/tags/nog_patch_50
203 Updated from xess branch. lampret 8364d 16h /or1k/tags/nog_patch_50
202 changed configure.in and acconfig.h to check for long long
reran autoheader & autoconf		 erez 8370d 00h /or1k/tags/nog_patch_50
201 readfunc() and writefunc() now use unsigned long values instead of unsigned char. erez 8370d 00h /or1k/tags/nog_patch_50
200 Initial import simons 8373d 07h /or1k/tags/nog_patch_50
199 Initial import simons 8373d 09h /or1k/tags/nog_patch_50
198 Moved from testbench.old simons 8375d 19h /or1k/tags/nog_patch_50
197 This is not used any more. simons 8375d 20h /or1k/tags/nog_patch_50
196 Configuration SPRs added. simons 8375d 20h /or1k/tags/nog_patch_50
195 New test added. simons 8375d 20h /or1k/tags/nog_patch_50
194 Fixed a bug for little endian architectures. Could cause a hang of
gdb under some circumstances.		 chris 8376d 04h /or1k/tags/nog_patch_50
193 Declared RISCOP.RESET to be volatile so that -O2 optimization would
not optimize away the correct behavior by trying to be too clever.		 chris 8376d 04h /or1k/tags/nog_patch_50
192 Removed GlobalMode reference causing problems for --disable-debugmod
option.		 chris 8376d 13h /or1k/tags/nog_patch_50
191 Added UART jitter var to sim config chris 8377d 10h /or1k/tags/nog_patch_50
190 Added jitter initialization chris 8377d 10h /or1k/tags/nog_patch_50
189 fixed mode handling for tick facility chris 8377d 10h /or1k/tags/nog_patch_50
188 fixed PIC interrupt controller chris 8377d 10h /or1k/tags/nog_patch_50
187 minor change to clear pending exception chris 8377d 10h /or1k/tags/nog_patch_50
186 major change to UART structure chris 8377d 10h /or1k/tags/nog_patch_50
185 major change to UART code chris 8377d 10h /or1k/tags/nog_patch_50
184 modified decode for trace debugging chris 8377d 10h /or1k/tags/nog_patch_50

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.