Rev |
Log message |
Author |
Age |
Path |
1765 |
|
root |
5628d 13h |
/or1k/tags/nog_patch_52/or1ksim/cpu/or1k/except.c |
1429 |
This commit was manufactured by cvs2svn to create tag 'nog_patch_52'. |
|
7068d 20h |
/or1k/tags/nog_patch_52/or1ksim/cpu/or1k/except.c |
1386 |
Rework exception handling |
nogj |
7075d 00h |
/or1k/tags/nog_patch_52/or1ksim/cpu/or1k/except.c |
1350 |
Mark a simulated cpu address as such, by introducing the new oraddr_t type |
nogj |
7118d 18h |
/or1k/tags/nog_patch_52/or1ksim/cpu/or1k/except.c |
1319 |
cpu/sim memory accesses separation, tick, exception, nr. of operands, cycles count,... corrections. |
phoenix |
7235d 13h |
/or1k/tags/nog_patch_52/or1ksim/cpu/or1k/except.c |
1308 |
Gyorgy Jeney: extensive cleanup |
phoenix |
7323d 13h |
/or1k/tags/nog_patch_52/or1ksim/cpu/or1k/except.c |
1202 |
at exception print insn number to ease debugging |
phoenix |
7575d 09h |
/or1k/tags/nog_patch_52/or1ksim/cpu/or1k/except.c |
997 |
PRINTF should be used instead of printf; command redirection repaired |
markom |
8020d 03h |
/or1k/tags/nog_patch_52/or1ksim/cpu/or1k/except.c |
703 |
small optimizations to dissasemble |
markom |
8197d 03h |
/or1k/tags/nog_patch_52/or1ksim/cpu/or1k/except.c |
693 |
exception info is outputted only in verbose mode |
markom |
8204d 04h |
/or1k/tags/nog_patch_52/or1ksim/cpu/or1k/except.c |
599 |
No more low/high priority interrupts (PICPR removed). Added tick timer exception. |
simons |
8235d 13h |
/or1k/tags/nog_patch_52/or1ksim/cpu/or1k/except.c |
572 |
Some new bugs fixed. |
simons |
8240d 15h |
/or1k/tags/nog_patch_52/or1ksim/cpu/or1k/except.c |
556 |
support for SPR_SR_EP added; cpu.sr added to config |
markom |
8245d 04h |
/or1k/tags/nog_patch_52/or1ksim/cpu/or1k/except.c |
535 |
stats is updated; statical single stats removed; t command output cleaned, added time output; cycles is moved to instructions; cycles now count time |
markom |
8247d 21h |
/or1k/tags/nog_patch_52/or1ksim/cpu/or1k/except.c |
479 |
connection with gdb repaired; temp_except_delay removed; lot of except and debug code cleaned; sys 203 causes stall under gdb; non-sim memory area log bug fixed |
markom |
8266d 22h |
/or1k/tags/nog_patch_52/or1ksim/cpu/or1k/except.c |
464 |
Some small bugs fixed. |
simons |
8267d 14h |
/or1k/tags/nog_patch_52/or1ksim/cpu/or1k/except.c |
458 |
Align, bus error and range exception fixed. |
simons |
8268d 14h |
/or1k/tags/nog_patch_52/or1ksim/cpu/or1k/except.c |
450 |
Exceptions are allways enabled. |
simons |
8272d 02h |
/or1k/tags/nog_patch_52/or1ksim/cpu/or1k/except.c |
437 |
When lsu instruction produce exception registers are preserved. |
simons |
8273d 22h |
/or1k/tags/nog_patch_52/or1ksim/cpu/or1k/except.c |
344 |
added acv test for uart; sim debug now has verbose levels; lot of bugs fixed in uart model |
markom |
8302d 01h |
/or1k/tags/nog_patch_52/or1ksim/cpu/or1k/except.c |
261 |
modified memory accesses; added cfg script; added pic test basic entry of vga; some extensions to mc |
markom |
8314d 02h |
/or1k/tags/nog_patch_52/or1ksim/cpu/or1k/except.c |
254 |
Made error report more verbose |
erez |
8315d 22h |
/or1k/tags/nog_patch_52/or1ksim/cpu/or1k/except.c |
221 |
major changes to testbench; debug unit is moved to /debug; memory organization can be customized; UART from simons; overall cleanup |
markom |
8323d 01h |
/or1k/tags/nog_patch_52/or1ksim/cpu/or1k/except.c |
182 |
updated exception handling procedures |
chris |
8371d 06h |
/or1k/tags/nog_patch_52/or1ksim/cpu/or1k/except.c |
167 |
- SPR values corrected
- testbenches now work
- lot of optimizations, use --disable-debugmod for optimal performance
- some tick timer bugs fixed |
markom |
8399d 22h |
/or1k/tags/nog_patch_52/or1ksim/cpu/or1k/except.c |
152 |
Breakpoint exceptions from single step are not printed now. |
chris |
8442d 05h |
/or1k/tags/nog_patch_52/or1ksim/cpu/or1k/except.c |
139 |
Modifications for functional gdb |
chris |
8444d 00h |
/or1k/tags/nog_patch_52/or1ksim/cpu/or1k/except.c |
133 |
moved header files to match other utilities
repaired l.sra and some other shifting instructions
started build_automata for binary instruction decode |
markom |
8450d 02h |
/or1k/tags/nog_patch_52/or1ksim/cpu/or1k/except.c |
128 |
Added code to check debug unit after an exception |
chris |
8451d 00h |
/or1k/tags/nog_patch_52/or1ksim/cpu/or1k/except.c |
123 |
Bugs fixed:
- l.rfe temporarly disables exceptions
- l.sys does PC -= 4
- breakpoints now supported at peripheria locations
- uart0.rt/.tx nonexistent file segment fault
Other modifications:
- replaced string names to instruction indexes
- execute.c executes specified (in ISA table) function
- modified ISA table - flag needed for gdb
- added or32.c, which supports or32.h
- added new instructions l.mac, l.msb, l.maci, l.macrc
and their executing functions (opcodes to be revisited)
- added header acconfig.h
- modified configuration files |
markom |
8456d 22h |
/or1k/tags/nog_patch_52/or1ksim/cpu/or1k/except.c |