OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_52/] [or1ksim/] [mmu/] - Rev 1765

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
1765 root 5585d 06h /or1k/tags/nog_patch_52/or1ksim/mmu
1429 This commit was manufactured by cvs2svn to create tag 'nog_patch_52'. 7025d 13h /or1k/tags/nog_patch_52/or1ksim/mmu
1418 Rearange some code such that it is not assumed that except_handle returns nogj 7025d 13h /or1k/tags/nog_patch_52/or1ksim/mmu
1416 Make the immu use the new debug functions nogj 7025d 13h /or1k/tags/nog_patch_52/or1ksim/mmu
1414 Rearange code in the dmmu such that it is not assumed that except_handle returns nogj 7025d 13h /or1k/tags/nog_patch_52/or1ksim/mmu
1412 Make the dmmu use the new debug functions nogj 7025d 13h /or1k/tags/nog_patch_52/or1ksim/mmu
1382 Nir Mor:
Implemented DCCFGR, ICCFGR, DMMUCFGR and IMMUCFGR spr registers.
nogj 7040d 17h /or1k/tags/nog_patch_52/or1ksim/mmu
1376 aclocal && autoconf && automake phoenix 7059d 17h /or1k/tags/nog_patch_52/or1ksim/mmu
1358 Modularise config file parseing. Paving the way for further modularisation. nogj 7066d 08h /or1k/tags/nog_patch_52/or1ksim/mmu
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7075d 11h /or1k/tags/nog_patch_52/or1ksim/mmu
1344 * Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes nogj 7088d 15h /or1k/tags/nog_patch_52/or1ksim/mmu
1308 Gyorgy Jeney: extensive cleanup phoenix 7280d 06h /or1k/tags/nog_patch_52/or1ksim/mmu
1249 Downgrading back to automake-1.4 lampret 7445d 06h /or1k/tags/nog_patch_52/or1ksim/mmu
1240 additional functions to bypass cache and mmu needed for peripheral devices phoenix 7452d 01h /or1k/tags/nog_patch_52/or1ksim/mmu
1174 fix for immu exceptions that never should have happened phoenix 7656d 05h /or1k/tags/nog_patch_52/or1ksim/mmu
1117 Ignore generated files for CVS purposes sfurman 7788d 06h /or1k/tags/nog_patch_52/or1ksim/mmu
1099 cvs bug fixed markom 7874d 17h /or1k/tags/nog_patch_52/or1ksim/mmu
997 PRINTF should be used instead of printf; command redirection repaired markom 7976d 20h /or1k/tags/nog_patch_52/or1ksim/mmu
970 Testbench is now running on ORP architecture platform. simons 7984d 07h /or1k/tags/nog_patch_52/or1ksim/mmu
886 MMU registers reserved fields protected from writing. simons 8020d 12h /or1k/tags/nog_patch_52/or1ksim/mmu
884 code cleaning - a lot of global variables moved to runtime struct markom 8020d 18h /or1k/tags/nog_patch_52/or1ksim/mmu
876 Beta release of ATA simulation rherveille 8028d 06h /or1k/tags/nog_patch_52/or1ksim/mmu
713 lot of small minor improvements: code documented, cleaned; runs at about same speed when not actually logging, but exe_log is enabled; raw_stats now run only with simple execution - enable RAW_USAGE_STATS macro markom 8148d 19h /or1k/tags/nog_patch_52/or1ksim/mmu
638 TLBTR CI bit is now working properly. simons 8179d 08h /or1k/tags/nog_patch_52/or1ksim/mmu
600 No more low/high priority interrupts (PICPR removed). Added tick timer exception. simons 8192d 06h /or1k/tags/nog_patch_52/or1ksim/mmu
572 Some new bugs fixed. simons 8197d 08h /or1k/tags/nog_patch_52/or1ksim/mmu
541 lot of new parameters concerning memory delays added; bpb parameter moved from cpu to new bpb section; UPDATE YOUR .CFG FILES! markom 8203d 16h /or1k/tags/nog_patch_52/or1ksim/mmu
535 stats is updated; statical single stats removed; t command output cleaned, added time output; cycles is moved to instructions; cycles now count time markom 8204d 14h /or1k/tags/nog_patch_52/or1ksim/mmu
517 some performance optimizations markom 8207d 15h /or1k/tags/nog_patch_52/or1ksim/mmu
500 Added .cvsignore files for annoying generated files erez 8209d 19h /or1k/tags/nog_patch_52/or1ksim/mmu

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.