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[/] [or1k/] [tags/] [nog_patch_58/] - Rev 1174

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Rev Log message Author Age Path
1174 fix for immu exceptions that never should have happened phoenix 7676d 10h /or1k/tags/nog_patch_58
1170 Added support for l.addc instruction. csanchez 7684d 14h /or1k/tags/nog_patch_58
1169 Added support for l.addc instruction. csanchez 7684d 15h /or1k/tags/nog_patch_58
1168 Added explicit alignment expressions. csanchez 7690d 01h /or1k/tags/nog_patch_58
1167 Corrected offset of TSS field within task_struct. csanchez 7690d 01h /or1k/tags/nog_patch_58
1166 Fixed problem with relocations of non-allocated sections. csanchez 7690d 01h /or1k/tags/nog_patch_58
1165 timeout bug fixed; contribution by Carlos markom 7706d 18h /or1k/tags/nog_patch_58
1161 When OR1200_NO_IMMU and OR1200_NO_IC are not both defined or undefined at the same time, results in a IC bug. Fixed. lampret 7710d 07h /or1k/tags/nog_patch_58
1160 added missing .rodata.* section into rom linker script phoenix 7741d 07h /or1k/tags/nog_patch_58
1159 No functional changes. Added defines to disable implementation of multiplier/MAC lampret 7753d 10h /or1k/tags/nog_patch_58
1158 Added simple uart test case. lampret 7754d 11h /or1k/tags/nog_patch_58
1157 Added syscall test case. lampret 7754d 12h /or1k/tags/nog_patch_58
1156 Tick timer test case added. lampret 7755d 08h /or1k/tags/nog_patch_58
1155 No functional change. Only added customization for exception vectors. lampret 7756d 12h /or1k/tags/nog_patch_58
1154 When using tty channel, put the serial port into raw mode (no echo, no
CR/LF conversion, no other line discipline/buffering).
sfurman 7764d 03h /or1k/tags/nog_patch_58
1153 When multiple interrupts were pending, e.g. TX buffer empty and RX
available, reading the UART's IIR register could potentially clear a
TX interrupt before it had been sent to the processor, thus dropping
the interrupt permanently.

Fix tested w/ both eCos and uclinux.
sfurman 7764d 14h /or1k/tags/nog_patch_58
1152 *** empty log message *** phoenix 7764d 18h /or1k/tags/nog_patch_58
1151 *** empty log message *** phoenix 7764d 18h /or1k/tags/nog_patch_58
1150 remove unneded include phoenix 7764d 19h /or1k/tags/nog_patch_58
1149 *** empty log message *** phoenix 7765d 07h /or1k/tags/nog_patch_58
1148 *** empty log message *** phoenix 7765d 07h /or1k/tags/nog_patch_58
1147 remove unneeded include phoenix 7765d 07h /or1k/tags/nog_patch_58
1146 cygwin fix phoenix 7765d 07h /or1k/tags/nog_patch_58
1145 1) Fix trivial bug w/ transmitter empty interrupts that I introduced in the
last check-in.
2) Improve printed output from debugging-only uart_status() routine.
sfurman 7765d 08h /or1k/tags/nog_patch_58
1144 Speed up gdb when running with serial targets:

When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)

When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump.
sfurman 7767d 14h /or1k/tags/nog_patch_58
1143 Make UART transmitter-empty interrupts match both 16450 and 16550 behavior. sfurman 7768d 04h /or1k/tags/nog_patch_58
1142 Speed up gdb when running with serial targets:

When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)

When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump.
sfurman 7768d 04h /or1k/tags/nog_patch_58
1141 WB = 1/2 RISC clock test code enabled. lampret 7769d 13h /or1k/tags/nog_patch_58
1140 Fixed OR1200_CLKDIV_x_SUPPORTED defines. Fixed order of ifdefs. lampret 7769d 13h /or1k/tags/nog_patch_58
1139 Fixed OR1200_CLKDIV_x_SUPPORTED defines. Better description. lampret 7769d 13h /or1k/tags/nog_patch_58

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