Rev |
Log message |
Author |
Age |
Path |
1338 |
l.ff1 instruction added |
andreje |
7121d 23h |
/or1k/tags/nog_patch_61/insight |
1333 |
gcc 3.4 compile fix |
phoenix |
7137d 00h |
/or1k/tags/nog_patch_61/insight |
1309 |
removed includes |
phoenix |
7294d 19h |
/or1k/tags/nog_patch_61/insight |
1308 |
Gyorgy Jeney: extensive cleanup |
phoenix |
7297d 16h |
/or1k/tags/nog_patch_61/insight |
1295 |
Updated instruction set descriptions. Changed FP instructions encoding. |
lampret |
7319d 16h |
/or1k/tags/nog_patch_61/insight |
1286 |
Changed desciption of the l.cust5 insns |
lampret |
7368d 19h |
/or1k/tags/nog_patch_61/insight |
1285 |
Changed desciption of the l.cust5 insns |
lampret |
7368d 19h |
/or1k/tags/nog_patch_61/insight |
1256 |
page size is 8192 on or32 |
phoenix |
7453d 19h |
/or1k/tags/nog_patch_61/insight |
1169 |
Added support for l.addc instruction. |
csanchez |
7681d 19h |
/or1k/tags/nog_patch_61/insight |
1152 |
*** empty log message *** |
phoenix |
7761d 22h |
/or1k/tags/nog_patch_61/insight |
1149 |
*** empty log message *** |
phoenix |
7762d 12h |
/or1k/tags/nog_patch_61/insight |
1144 |
Speed up gdb when running with serial targets:
When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)
When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump. |
sfurman |
7764d 18h |
/or1k/tags/nog_patch_61/insight |
1142 |
Speed up gdb when running with serial targets:
When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)
When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump. |
sfurman |
7765d 09h |
/or1k/tags/nog_patch_61/insight |
1124 |
Initialize or1k_implementation with reasonable defaults for the number
of implementation registers. This doesn't affect the jtag or sim
targets at all because those values are always overwritten when
or1k_implementation is initialized. However, it is necessary when
connecting to remote gdb stubs through a serial port or socket, since
or1k_implementation is not yet initialized for those targets. |
sfurman |
7798d 11h |
/or1k/tags/nog_patch_61/insight |
1123 |
Renumber/rename SPRs to match latest architecture doc |
sfurman |
7799d 18h |
/or1k/tags/nog_patch_61/insight |
1115 |
Fix stack-walking code in or1k_frame_chain() and or1k_skip_prologue()
to expect the function prologue that or32 gcc currently emits, rather
than a previous incarnation of the or1k ABI. |
sfurman |
7821d 15h |
/or1k/tags/nog_patch_61/insight |
1114 |
Added cvs log keywords |
lampret |
7836d 11h |
/or1k/tags/nog_patch_61/insight |
1034 |
Fixed encoding for l.div/l.divu. |
lampret |
7978d 12h |
/or1k/tags/nog_patch_61/insight |
879 |
Initial version of OpenRISC Custom Unit Compiler added |
markom |
8043d 22h |
/or1k/tags/nog_patch_61/insight |
874 |
Command for displaying trace buffer added. |
simons |
8053d 23h |
/or1k/tags/nog_patch_61/insight |
801 |
l.muli instruction added |
markom |
8136d 02h |
/or1k/tags/nog_patch_61/insight |
722 |
floating point registers are obsolete; GPRs should be used instead |
markom |
8164d 02h |
/or1k/tags/nog_patch_61/insight |
720 |
single floating point support added |
markom |
8164d 05h |
/or1k/tags/nog_patch_61/insight |
717 |
some minor improvements |
markom |
8164d 07h |
/or1k/tags/nog_patch_61/insight |
714 |
do_stats introduced for faster no-stats execution |
markom |
8166d 03h |
/or1k/tags/nog_patch_61/insight |
709 |
eval_operands is now being generated |
markom |
8169d 08h |
/or1k/tags/nog_patch_61/insight |
706 |
insn_decode execution part replaced by generated function decode_execute; use --enable-simple to use runtime decoding |
markom |
8170d 01h |
/or1k/tags/nog_patch_61/insight |
703 |
small optimizations to dissasemble |
markom |
8171d 05h |
/or1k/tags/nog_patch_61/insight |
680 |
num_opcodes better because of linking. |
ivang |
8180d 22h |
/or1k/tags/nog_patch_61/insight |
679 |
extern CONST int num_opcodes -> extern CONST unsigned int or32_num_opcodes. |
ivang |
8181d 00h |
/or1k/tags/nog_patch_61/insight |