Rev |
Log message |
Author |
Age |
Path |
1170 |
Added support for l.addc instruction. |
csanchez |
7685d 07h |
/or1k/tags/nog_patch_61 |
1169 |
Added support for l.addc instruction. |
csanchez |
7685d 08h |
/or1k/tags/nog_patch_61 |
1168 |
Added explicit alignment expressions. |
csanchez |
7690d 18h |
/or1k/tags/nog_patch_61 |
1167 |
Corrected offset of TSS field within task_struct. |
csanchez |
7690d 18h |
/or1k/tags/nog_patch_61 |
1166 |
Fixed problem with relocations of non-allocated sections. |
csanchez |
7690d 18h |
/or1k/tags/nog_patch_61 |
1165 |
timeout bug fixed; contribution by Carlos |
markom |
7707d 11h |
/or1k/tags/nog_patch_61 |
1161 |
When OR1200_NO_IMMU and OR1200_NO_IC are not both defined or undefined at the same time, results in a IC bug. Fixed. |
lampret |
7711d 00h |
/or1k/tags/nog_patch_61 |
1160 |
added missing .rodata.* section into rom linker script |
phoenix |
7742d 00h |
/or1k/tags/nog_patch_61 |
1159 |
No functional changes. Added defines to disable implementation of multiplier/MAC |
lampret |
7754d 03h |
/or1k/tags/nog_patch_61 |
1158 |
Added simple uart test case. |
lampret |
7755d 04h |
/or1k/tags/nog_patch_61 |
1157 |
Added syscall test case. |
lampret |
7755d 05h |
/or1k/tags/nog_patch_61 |
1156 |
Tick timer test case added. |
lampret |
7756d 01h |
/or1k/tags/nog_patch_61 |
1155 |
No functional change. Only added customization for exception vectors. |
lampret |
7757d 05h |
/or1k/tags/nog_patch_61 |
1154 |
When using tty channel, put the serial port into raw mode (no echo, no
CR/LF conversion, no other line discipline/buffering). |
sfurman |
7764d 20h |
/or1k/tags/nog_patch_61 |
1153 |
When multiple interrupts were pending, e.g. TX buffer empty and RX
available, reading the UART's IIR register could potentially clear a
TX interrupt before it had been sent to the processor, thus dropping
the interrupt permanently.
Fix tested w/ both eCos and uclinux. |
sfurman |
7765d 07h |
/or1k/tags/nog_patch_61 |
1152 |
*** empty log message *** |
phoenix |
7765d 11h |
/or1k/tags/nog_patch_61 |
1151 |
*** empty log message *** |
phoenix |
7765d 11h |
/or1k/tags/nog_patch_61 |
1150 |
remove unneded include |
phoenix |
7765d 12h |
/or1k/tags/nog_patch_61 |
1149 |
*** empty log message *** |
phoenix |
7766d 00h |
/or1k/tags/nog_patch_61 |
1148 |
*** empty log message *** |
phoenix |
7766d 00h |
/or1k/tags/nog_patch_61 |
1147 |
remove unneeded include |
phoenix |
7766d 00h |
/or1k/tags/nog_patch_61 |
1146 |
cygwin fix |
phoenix |
7766d 00h |
/or1k/tags/nog_patch_61 |
1145 |
1) Fix trivial bug w/ transmitter empty interrupts that I introduced in the
last check-in.
2) Improve printed output from debugging-only uart_status() routine. |
sfurman |
7766d 01h |
/or1k/tags/nog_patch_61 |
1144 |
Speed up gdb when running with serial targets:
When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)
When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump. |
sfurman |
7768d 06h |
/or1k/tags/nog_patch_61 |
1143 |
Make UART transmitter-empty interrupts match both 16450 and 16550 behavior. |
sfurman |
7768d 21h |
/or1k/tags/nog_patch_61 |
1142 |
Speed up gdb when running with serial targets:
When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)
When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump. |
sfurman |
7768d 21h |
/or1k/tags/nog_patch_61 |
1141 |
WB = 1/2 RISC clock test code enabled. |
lampret |
7770d 06h |
/or1k/tags/nog_patch_61 |
1140 |
Fixed OR1200_CLKDIV_x_SUPPORTED defines. Fixed order of ifdefs. |
lampret |
7770d 06h |
/or1k/tags/nog_patch_61 |
1139 |
Fixed OR1200_CLKDIV_x_SUPPORTED defines. Better description. |
lampret |
7770d 06h |
/or1k/tags/nog_patch_61 |
1138 |
Added some information how to run simulations. |
lampret |
7771d 01h |
/or1k/tags/nog_patch_61 |