OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_68/] [or1ksim/] [peripheral/] [eth.c] - Rev 1765

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
1765 root 5636d 18h /or1k/tags/nog_patch_68/or1ksim/peripheral/eth.c
1462 This commit was manufactured by cvs2svn to create tag 'nog_patch_68'. 7077d 00h /or1k/tags/nog_patch_68/or1ksim/peripheral/eth.c
1461 Add an optional `enabled' paramter to every peripheral nogj 7077d 00h /or1k/tags/nog_patch_68/or1ksim/peripheral/eth.c
1390 * Change scheduler to count down to 0 instead of reaching a certain cycle
count.
* Change the SCHED_ADD interface to take a time out as the parameter instead of the number of cycles.
nogj 7077d 01h /or1k/tags/nog_patch_68/or1ksim/peripheral/eth.c
1388 Remove useless define nogj 7083d 04h /or1k/tags/nog_patch_68/or1ksim/peripheral/eth.c
1372 Cleanup ethernet peripheral, useing the new callbacks nogj 7117d 19h /or1k/tags/nog_patch_68/or1ksim/peripheral/eth.c
1366 Pass a caller given pointer to the vapi_read callback nogj 7117d 19h /or1k/tags/nog_patch_68/or1ksim/peripheral/eth.c
1359 Pass private data in readfunc/writefunc callbacks nogj 7117d 20h /or1k/tags/nog_patch_68/or1ksim/peripheral/eth.c
1358 Modularise config file parseing. Paving the way for further modularisation. nogj 7117d 20h /or1k/tags/nog_patch_68/or1ksim/peripheral/eth.c
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7126d 23h /or1k/tags/nog_patch_68/or1ksim/peripheral/eth.c
1332 gcc 3.4.3 compile fix phoenix 7174d 19h /or1k/tags/nog_patch_68/or1ksim/peripheral/eth.c
1308 Gyorgy Jeney: extensive cleanup phoenix 7331d 17h /or1k/tags/nog_patch_68/or1ksim/peripheral/eth.c
1244 Added "cm" command to copy data inside memory.
Make or1ksim work on little endian platforms.
Port to Mac OS X.
Some bugfixes.
Allow JTAG write access to read-only memory regions.
hpanther 7499d 02h /or1k/tags/nog_patch_68/or1ksim/peripheral/eth.c
1241 make it work with MMU enabled phoenix 7503d 12h /or1k/tags/nog_patch_68/or1ksim/peripheral/eth.c
1068 Minimum packet length cheching changed to present the real hw. simons 7966d 15h /or1k/tags/nog_patch_68/or1ksim/peripheral/eth.c
1018 TX_BD_NUM register now contains a real number of transmit BDs (before this was n*2) simons 8021d 03h /or1k/tags/nog_patch_68/or1ksim/peripheral/eth.c
997 PRINTF should be used instead of printf; command redirection repaired markom 8028d 08h /or1k/tags/nog_patch_68/or1ksim/peripheral/eth.c
970 Testbench is now running on ORP architecture platform. simons 8035d 19h /or1k/tags/nog_patch_68/or1ksim/peripheral/eth.c
889 Modified Ethernet model. ivang 8069d 22h /or1k/tags/nog_patch_68/or1ksim/peripheral/eth.c
884 code cleaning - a lot of global variables moved to runtime struct markom 8072d 06h /or1k/tags/nog_patch_68/or1ksim/peripheral/eth.c
867 ifdefs changed to ifs, to exclude ethernet_i header file markom 8109d 10h /or1k/tags/nog_patch_68/or1ksim/peripheral/eth.c
849 eth phy is now optional and disabled by default, use --enable-ethphy to enable it markom 8130d 03h /or1k/tags/nog_patch_68/or1ksim/peripheral/eth.c
844 Fix. ivang 8140d 00h /or1k/tags/nog_patch_68/or1ksim/peripheral/eth.c
841 Controller reset fixed. simons 8144d 01h /or1k/tags/nog_patch_68/or1ksim/peripheral/eth.c
836 Fixed bug in file interface. Modified testcase to suid modifications. ivang 8148d 00h /or1k/tags/nog_patch_68/or1ksim/peripheral/eth.c
744 Some changes and fixes. simons 8186d 21h /or1k/tags/nog_patch_68/or1ksim/peripheral/eth.c
725 Added some more configuration parameters. ivang 8198d 01h /or1k/tags/nog_patch_68/or1ksim/peripheral/eth.c
723 Added configuration for socket interface and IRQ level. ivang 8198d 01h /or1k/tags/nog_patch_68/or1ksim/peripheral/eth.c
705 Updated changed registers. ivang 8205d 03h /or1k/tags/nog_patch_68/or1ksim/peripheral/eth.c
702 Initial coding of ethernet simulator model finished. ivang 8205d 07h /or1k/tags/nog_patch_68/or1ksim/peripheral/eth.c

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.