OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_70] - Rev 66

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
66 Added another set of eval_ functions that should be used directly by simulator.
evalsim_ and setsim_ don't go through MMU transaltion mechanism.		 lampret 8677d 07h /or1k/tags/nog_patch_70
65 Added DMMU stats. lampret 8677d 07h /or1k/tags/nog_patch_70
64 SPR bit definition moved to spr_defs.h. lampret 8677d 08h /or1k/tags/nog_patch_70
63 Fixed a bug in getsprbits/setsprbits functions (now mask can have arbitry
alignment of bits).		 lampret 8677d 08h /or1k/tags/nog_patch_70
62 OR1K DMMU model. lampret 8677d 08h /or1k/tags/nog_patch_70
61 2000-09-26 Joel Sherrill <joel@OARcorp.com>

* libc/sys/rtems/include/pthread.h: Added file missed by earlier
commit of RTEMS modifications.		 joel 8692d 02h /or1k/tags/nog_patch_70
60 Memory model changed. lampret 8712d 11h /or1k/tags/nog_patch_70
59 2000-09-05 Joel Sherrill <joel@OARcorp.com>

* Merged newlib-1.8.2-rtems-20000905.diff which includes
or16 and or32 configuration support.		 joel 8712d 22h /or1k/tags/nog_patch_70
57 This commit was generated by cvs2svn to compensate for changes in r56, which
included commits to RCS files with non-trunk default branches.		 joel 8718d 20h /or1k/tags/nog_patch_70
55 Added 'dv' command for dumping memory as verilog model. lampret 8728d 08h /or1k/tags/nog_patch_70
54 Regular maintenance. lampret 8728d 08h /or1k/tags/nog_patch_70
53 Added setjmp/longjmp. lampret 8733d 08h /or1k/tags/nog_patch_70
52 Comment character changed. lampret 8789d 03h /or1k/tags/nog_patch_70
51 Exception detection changed a bit. lampret 8789d 04h /or1k/tags/nog_patch_70
50 Added CURINSN macro. lampret 8789d 04h /or1k/tags/nog_patch_70
49 Changed simulation mode to non-virtual (real). lampret 8789d 04h /or1k/tags/nog_patch_70
48 Added CCR. lampret 8789d 04h /or1k/tags/nog_patch_70
47 Added interrupt recognition and better memory dump. lampret 8789d 04h /or1k/tags/nog_patch_70
46 Added srand(). lampret 8789d 04h /or1k/tags/nog_patch_70
45 Added NONE. lampret 8789d 04h /or1k/tags/nog_patch_70
44 %s bug fixed. lampret 8794d 09h /or1k/tags/nog_patch_70
43 SUPV bit from SR is now saved into EPCR bit 0. lampret 8799d 12h /or1k/tags/nog_patch_70
42 Bug fix. Only symbols with names shorter than 9 characters are loaded. lampret 8799d 12h /or1k/tags/nog_patch_70
41 Bug fix. Now all COFF sections are loaded not just .text. lampret 8800d 10h /or1k/tags/nog_patch_70
40 This commit was generated by cvs2svn to compensate for changes in r39, which
included commits to RCS files with non-trunk default branches.		 lampret 8800d 14h /or1k/tags/nog_patch_70
38 Virtual machine at the moment. lampret 8800d 15h /or1k/tags/nog_patch_70
37 STACK_SIZE is not properly used (will be removed soon). lampret 8800d 15h /or1k/tags/nog_patch_70
36 Fixed bug when loading "data" from .text segment (all insns are not only
decoded but also placed in simulator memory undecoded as data).		 lampret 8800d 15h /or1k/tags/nog_patch_70
35 SLP hooks. lampret 8800d 15h /or1k/tags/nog_patch_70
34 Started with SLP (not finished yet). lampret 8800d 15h /or1k/tags/nog_patch_70

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.