OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_73] - Rev 83

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
83 Updates. lampret 8506d 07h /or1k/tags/nog_patch_73
82 Changed pctemp to pcnext. lampret 8506d 07h /or1k/tags/nog_patch_73
80 First import. lampret 8534d 02h /or1k/tags/nog_patch_73
79 Data and instruction cache simulation added. lampret 8535d 23h /or1k/tags/nog_patch_73
78 (i/d)tlb_status lampret 8659d 13h /or1k/tags/nog_patch_73
77 Regular update. lampret 8659d 13h /or1k/tags/nog_patch_73
76 regular update lampret 8659d 13h /or1k/tags/nog_patch_73
75 simgetstr added. eval_mem32 replaced with evalsim_mem32. lampret 8659d 13h /or1k/tags/nog_patch_73
74 Same as DMMU. lampret 8666d 12h /or1k/tags/nog_patch_73
73 Fixed all bugs. Now more or less works. IMMU still has some problems (exception start). lampret 8666d 12h /or1k/tags/nog_patch_73
72 Added 'how to build GNU tools' lampret 8671d 13h /or1k/tags/nog_patch_73
71 Clean two typos. lampret 8676d 15h /or1k/tags/nog_patch_73
70 Basic setjmp/longjmp are ready. lampret 8676d 15h /or1k/tags/nog_patch_73
69 Sim debug. lampret 8678d 13h /or1k/tags/nog_patch_73
68 Added hook for l.sys 204. Changed SPR of flag (no more CCR) lampret 8678d 13h /or1k/tags/nog_patch_73
67 Added simulator "application load". lampret 8678d 13h /or1k/tags/nog_patch_73
66 Added another set of eval_ functions that should be used directly by simulator.
evalsim_ and setsim_ don't go through MMU transaltion mechanism.		 lampret 8678d 13h /or1k/tags/nog_patch_73
65 Added DMMU stats. lampret 8678d 13h /or1k/tags/nog_patch_73
64 SPR bit definition moved to spr_defs.h. lampret 8678d 13h /or1k/tags/nog_patch_73
63 Fixed a bug in getsprbits/setsprbits functions (now mask can have arbitry
alignment of bits).		 lampret 8678d 13h /or1k/tags/nog_patch_73
62 OR1K DMMU model. lampret 8678d 13h /or1k/tags/nog_patch_73
61 2000-09-26 Joel Sherrill <joel@OARcorp.com>

* libc/sys/rtems/include/pthread.h: Added file missed by earlier
commit of RTEMS modifications.		 joel 8693d 07h /or1k/tags/nog_patch_73
60 Memory model changed. lampret 8713d 16h /or1k/tags/nog_patch_73
59 2000-09-05 Joel Sherrill <joel@OARcorp.com>

* Merged newlib-1.8.2-rtems-20000905.diff which includes
or16 and or32 configuration support.		 joel 8714d 03h /or1k/tags/nog_patch_73
57 This commit was generated by cvs2svn to compensate for changes in r56, which
included commits to RCS files with non-trunk default branches.		 joel 8720d 01h /or1k/tags/nog_patch_73
55 Added 'dv' command for dumping memory as verilog model. lampret 8729d 13h /or1k/tags/nog_patch_73
54 Regular maintenance. lampret 8729d 13h /or1k/tags/nog_patch_73
53 Added setjmp/longjmp. lampret 8734d 13h /or1k/tags/nog_patch_73
52 Comment character changed. lampret 8790d 09h /or1k/tags/nog_patch_73
51 Exception detection changed a bit. lampret 8790d 09h /or1k/tags/nog_patch_73

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.