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Rev	Log message	Author	Age	Path
1765		root	5625d 03h	/or1k/tags/rel-0-3-0-rc1/insight/opcodes
1749	This commit was manufactured by cvs2svn to create tag 'rel-0-3-0-rc1'.		5774d 09h	/or1k/tags/rel-0-3-0-rc1/insight/opcodes
1748	These are all the changes for Or1ksim 0.3.0 release candidate 1. The changes are explained in the NEWS, README and ChangeLog files. A number of long-standing bugs are fixed (see the OpenRISC tracker), and the code is brought up to a consistent standard, following the GNU coding conventions throughout. Argument parsing now uses argtable2, and a User Guide has been added. Documentation throughout has been extended to be compatible with Doxygen, providing a further level of technical detail on the internals.	jeremybennett	5774d 09h	/or1k/tags/rel-0-3-0-rc1/insight/opcodes
1672	Store instructions don't modify any register. Don't mark them as such in the arch. definitions	nogj	6771d 07h	/or1k/tags/rel-0-3-0-rc1/insight/opcodes
1656	Pass the instruction operands as part of the op_queue structure.	nogj	6771d 07h	/or1k/tags/rel-0-3-0-rc1/insight/opcodes
1605	Execute l.ff1 instruction	nogj	6833d 08h	/or1k/tags/rel-0-3-0-rc1/insight/opcodes
1597	Fix parsing the destination register	nogj	6845d 10h	/or1k/tags/rel-0-3-0-rc1/insight/opcodes
1590	Added l.fl1	lampret	6848d 07h	/or1k/tags/rel-0-3-0-rc1/insight/opcodes
1557	Fix most warnings issued by gcc4	nogj	6907d 17h	/or1k/tags/rel-0-3-0-rc1/insight/opcodes
1554	fixed l.maci encoding	phoenix	6925d 04h	/or1k/tags/rel-0-3-0-rc1/insight/opcodes
1475	l.rfe does not have a delay slot. Don't mark it as such.	nogj	7038d 07h	/or1k/tags/rel-0-3-0-rc1/insight/opcodes
1452	Implement a dynamic recompiler to speed up the execution	nogj	7065d 10h	/or1k/tags/rel-0-3-0-rc1/insight/opcodes
1440	Reclasify l.trap and l.sys to be an exception instruction	nogj	7065d 10h	/or1k/tags/rel-0-3-0-rc1/insight/opcodes
1384	Fix the parameters to the l.ff1/l.maci instructions	nogj	7080d 14h	/or1k/tags/rel-0-3-0-rc1/insight/opcodes
1350	Mark a simulated cpu address as such, by introducing the new oraddr_t type	nogj	7115d 08h	/or1k/tags/rel-0-3-0-rc1/insight/opcodes
1346	Remove the global op structure	nogj	7128d 12h	/or1k/tags/rel-0-3-0-rc1/insight/opcodes
1342	* Fix generate.c to produce a execgen.c with less warnings. * Fix the --enable-simple configure option.	nogj	7128d 13h	/or1k/tags/rel-0-3-0-rc1/insight/opcodes
1341	Mark wich operand is the destination operand in the architechture definition	nogj	7128d 13h	/or1k/tags/rel-0-3-0-rc1/insight/opcodes
1338	l.ff1 instruction added	andreje	7144d 10h	/or1k/tags/rel-0-3-0-rc1/insight/opcodes
1309	removed includes	phoenix	7317d 06h	/or1k/tags/rel-0-3-0-rc1/insight/opcodes
1308	Gyorgy Jeney: extensive cleanup	phoenix	7320d 03h	/or1k/tags/rel-0-3-0-rc1/insight/opcodes
1295	Updated instruction set descriptions. Changed FP instructions encoding.	lampret	7342d 03h	/or1k/tags/rel-0-3-0-rc1/insight/opcodes
1286	Changed desciption of the l.cust5 insns	lampret	7391d 06h	/or1k/tags/rel-0-3-0-rc1/insight/opcodes
1285	Changed desciption of the l.cust5 insns	lampret	7391d 06h	/or1k/tags/rel-0-3-0-rc1/insight/opcodes
1169	Added support for l.addc instruction.	csanchez	7704d 07h	/or1k/tags/rel-0-3-0-rc1/insight/opcodes
1114	Added cvs log keywords	lampret	7858d 22h	/or1k/tags/rel-0-3-0-rc1/insight/opcodes
1034	Fixed encoding for l.div/l.divu.	lampret	8001d 00h	/or1k/tags/rel-0-3-0-rc1/insight/opcodes
879	Initial version of OpenRISC Custom Unit Compiler added	markom	8066d 10h	/or1k/tags/rel-0-3-0-rc1/insight/opcodes
801	l.muli instruction added	markom	8158d 13h	/or1k/tags/rel-0-3-0-rc1/insight/opcodes
722	floating point registers are obsolete; GPRs should be used instead	markom	8186d 13h	/or1k/tags/rel-0-3-0-rc1/insight/opcodes

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[/] [or1k/] [tags/] [rel-0-3-0-rc1/] [insight/] [opcodes/] - Rev 1765

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