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[/] [or1k/] [tags/] [rel-0-3-0-rc2/] - Rev 171

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171 Added monitor.v and timescale.v lampret 8373d 04h /or1k/tags/rel-0-3-0-rc2
170 Added cfg regs. Moved all defines into one defines.v file. More cleanup. lampret 8373d 04h /or1k/tags/rel-0-3-0-rc2
169 Fixed memory cells. Moved monitor.h into monitor.v lampret 8373d 04h /or1k/tags/rel-0-3-0-rc2
168 Major clean-up. lampret 8376d 18h /or1k/tags/rel-0-3-0-rc2
167 - SPR values corrected
- testbenches now work
- lot of optimizations, use --disable-debugmod for optimal performance
- some tick timer bugs fixed
markom 8377d 17h /or1k/tags/rel-0-3-0-rc2
166 Fixed RAM's oen bug. Cache bypass under development. lampret 8395d 04h /or1k/tags/rel-0-3-0-rc2
165 Added variable ack of WB transfers (see NODELAY_WBx). lampret 8395d 04h /or1k/tags/rel-0-3-0-rc2
164 *** empty log message *** lampret 8397d 07h /or1k/tags/rel-0-3-0-rc2
163 Forgot files.f file. lampret 8397d 07h /or1k/tags/rel-0-3-0-rc2
162 Benches (under development). lampret 8397d 07h /or1k/tags/rel-0-3-0-rc2
161 Development version of RTL. Libraries are missing. lampret 8397d 07h /or1k/tags/rel-0-3-0-rc2
160 simulation script lampret 8397d 07h /or1k/tags/rel-0-3-0-rc2
159 synthesis scripts lampret 8397d 07h /or1k/tags/rel-0-3-0-rc2
158 Initial RTEMS import chris 8406d 21h /or1k/tags/rel-0-3-0-rc2
157 Update simons 8414d 00h /or1k/tags/rel-0-3-0-rc2
156 File moved to opcode. simons 8414d 00h /or1k/tags/rel-0-3-0-rc2
155 Update simons 8414d 00h /or1k/tags/rel-0-3-0-rc2
154 Updated for new runtime environment chris 8420d 00h /or1k/tags/rel-0-3-0-rc2
153 Writes to SPR_PC are now enabled chris 8420d 00h /or1k/tags/rel-0-3-0-rc2
152 Breakpoint exceptions from single step are not printed now. chris 8420d 01h /or1k/tags/rel-0-3-0-rc2
151 Typo in the previous commit. Sorry. chris 8420d 01h /or1k/tags/rel-0-3-0-rc2
150 Fixed some single stepping issues chris 8420d 01h /or1k/tags/rel-0-3-0-rc2
149 Fixed bug where disassemble command caused a segmentation fault chris 8421d 03h /or1k/tags/rel-0-3-0-rc2
148 Replace single stepping patch that got overwritten chris 8421d 04h /or1k/tags/rel-0-3-0-rc2
147 Initial checkin of instructions chris 8421d 19h /or1k/tags/rel-0-3-0-rc2
146 Mofications to work with or1ksim JTAG based simulation chris 8421d 19h /or1k/tags/rel-0-3-0-rc2
145 Modifications necessary for functional gdb debugging interface chris 8421d 19h /or1k/tags/rel-0-3-0-rc2
144 Modifications necessary for functional gdb interface chris 8421d 19h /or1k/tags/rel-0-3-0-rc2
143 Modifications necessary to work with JTAG or1ksim simulator chris 8421d 19h /or1k/tags/rel-0-3-0-rc2
142 Modifications for a functional gdb environment chris 8421d 19h /or1k/tags/rel-0-3-0-rc2

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