| Rev |
Log message |
Author |
Age |
Path |
| 1765 |
|
root |
5589d 22h |
/or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/execute.h |
| 1753 |
This commit was manufactured by cvs2svn to create tag 'rel-0-3-0-rc2'. |
|
5709d 05h |
/or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/execute.h |
| 1751 |
These are the changes to support Or1ksim 0.3.0rc2. Most significantly they provide GDB RSP support. They also fix 5 outstanding bugs and satisfy one new feature request. |
jeremybennett |
5709d 07h |
/or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/execute.h |
| 1748 |
These are all the changes for Or1ksim 0.3.0 release candidate 1. The changes
are explained in the NEWS, README and ChangeLog files. A number of
long-standing bugs are fixed (see the OpenRISC tracker), and the code is
brought up to a consistent standard, following the GNU coding conventions
throughout.
Argument parsing now uses argtable2, and a User Guide has been added.
Documentation throughout has been extended to be compatible with Doxygen,
providing a further level of technical detail on the internals. |
jeremybennett |
5739d 03h |
/or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/execute.h |
| 1715 |
Add the capability to the pic to simulate a level or edge triggered pic. Add
a clear_interrupt() function that the peripherals need to use to signal that
they negated their interrupt line. |
nogj |
6736d 00h |
/or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/execute.h |
| 1692 |
Instead of playing games with the esp when a jump needs to be executed, use
longjmp() to get to the jump handling code. |
nogj |
6736d 00h |
/or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/execute.h |
| 1690 |
Move the main execution loop to execute.c. |
nogj |
6736d 00h |
/or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/execute.h |
| 1687 |
Don't use MMX registers to keep track of the pc and the number of cycles
remaining untill the next job. Keeping the two places that these where used at
concurrent bloated generated code quite a bit and there was no performance
increase resulting from their use. |
nogj |
6736d 00h |
/or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/execute.h |
| 1678 |
Remove the ts_current hack by haveing the temporaries always shipped out before
any instruction that has the posibility to generate an exception |
nogj |
6736d 01h |
/or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/execute.h |
| 1547 |
Use an array to keep track of the recompiled pages instead of a linked list |
nogj |
6934d 01h |
/or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/execute.h |
| 1481 |
Remove the useless cross reference stuff: it was a bad idea to begin with |
nogj |
7003d 01h |
/or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/execute.h |
| 1452 |
Implement a dynamic recompiler to speed up the execution |
nogj |
7030d 04h |
/or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/execute.h |
| 1434 |
Fix the prototype of setsim_reg |
nogj |
7030d 05h |
/or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/execute.h |
| 1432 |
Collect most of the cpu state variables in a structure (cpu_state) |
nogj |
7030d 05h |
/or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/execute.h |
| 1350 |
Mark a simulated cpu address as such, by introducing the new oraddr_t type |
nogj |
7080d 03h |
/or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/execute.h |
| 1308 |
Gyorgy Jeney: extensive cleanup |
phoenix |
7284d 22h |
/or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/execute.h |
| 560 |
some code cleanup |
markom |
8205d 11h |
/or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/execute.h |
| 557 |
some optimizations; fsim running at 2MIPS; pm section added to config; configure bug fixed |
markom |
8206d 10h |
/or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/execute.h |
| 294 |
improved config parser |
markom |
8270d 12h |
/or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/execute.h |
| 138 |
- on the fly insn decoding
- removed asm input file support
- removed string from execution
- speedup of loading |
markom |
8408d 12h |
/or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/execute.h |
| 123 |
Bugs fixed:
- l.rfe temporarly disables exceptions
- l.sys does PC -= 4
- breakpoints now supported at peripheria locations
- uart0.rt/.tx nonexistent file segment fault
Other modifications:
- replaced string names to instruction indexes
- execute.c executes specified (in ISA table) function
- modified ISA table - flag needed for gdb
- added or32.c, which supports or32.h
- added new instructions l.mac, l.msb, l.maci, l.macrc
and their executing functions (opcodes to be revisited)
- added header acconfig.h
- modified configuration files |
markom |
8418d 07h |
/or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/execute.h |
| 83 |
Updates. |
lampret |
8490d 07h |
/or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/execute.h |
| 50 |
Added CURINSN macro. |
lampret |
8774d 09h |
/or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/execute.h |
| 3 |
This commit was generated by cvs2svn to compensate for changes in r2, which
included commits to RCS files with non-trunk default branches. |
cvs |
9010d 17h |
/or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/execute.h |
| 2 |
First import. |
cvs |
9010d 17h |
/or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/execute.h |
