OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel-0-3-0-rc2] - Rev 275

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
275 This are temporary files. simons 8317d 15h /or1k/tags/rel-0-3-0-rc2
274 *** empty log message *** simons 8317d 15h /or1k/tags/rel-0-3-0-rc2
273 This are temporary files. simons 8317d 15h /or1k/tags/rel-0-3-0-rc2
272 Moved to separate folder. simons 8317d 16h /or1k/tags/rel-0-3-0-rc2
271 Added missing endif lampret 8317d 19h /or1k/tags/rel-0-3-0-rc2
270 some speedups, when debug module is disabled markom 8318d 02h /or1k/tags/rel-0-3-0-rc2
269 added labels; corrected false if clause, preventing to fill iqueue markom 8318d 02h /or1k/tags/rel-0-3-0-rc2
268 First import. lampret 8318d 14h /or1k/tags/rel-0-3-0-rc2
267 First import. lampret 8318d 14h /or1k/tags/rel-0-3-0-rc2
266 First import. lampret 8318d 14h /or1k/tags/rel-0-3-0-rc2
265 Modified virtual silicon instantiations. lampret 8320d 15h /or1k/tags/rel-0-3-0-rc2
264 updated cpu config section; added sim config section markom 8320d 19h /or1k/tags/rel-0-3-0-rc2
263 configure for cpu; modified command line options markom 8320d 20h /or1k/tags/rel-0-3-0-rc2
262 small bug in build_automata fixed; configure for memory markom 8320d 21h /or1k/tags/rel-0-3-0-rc2
261 modified memory accesses; added cfg script; added pic test basic entry of vga; some extensions to mc markom 8321d 00h /or1k/tags/rel-0-3-0-rc2
260 Replaced some 8-bit memory access with 32-bit erez 8322d 13h /or1k/tags/rel-0-3-0-rc2
259 Removed tick/Makefile, which is generated anyway erez 8322d 16h /or1k/tags/rel-0-3-0-rc2
258 Added Ethernet test; renamed dma to dmatest; commented out missing pic.c erez 8322d 16h /or1k/tags/rel-0-3-0-rc2
257 Added initial Ethernet simulation (only TX as yet) erez 8322d 16h /or1k/tags/rel-0-3-0-rc2
256 fixed masked_increase() in dma.c erez 8322d 17h /or1k/tags/rel-0-3-0-rc2
255 mtspr() now correctly sets value to register erez 8322d 19h /or1k/tags/rel-0-3-0-rc2
254 Made error report more verbose erez 8322d 19h /or1k/tags/rel-0-3-0-rc2
253 Made macros slightly more robust erez 8322d 20h /or1k/tags/rel-0-3-0-rc2
252 Fixed typo erez 8322d 20h /or1k/tags/rel-0-3-0-rc2
251 "Granularity" bugfix erez 8322d 20h /or1k/tags/rel-0-3-0-rc2
247 Major update of the enviorment. Now uses autoconf and automake. The
simulator uses readline aswell to get input from the user. A number of
new files added, some modified. The libc directory is now called support.		 jrydberg 8325d 06h /or1k/tags/rel-0-3-0-rc2
245 Initial revision cvs 8325d 06h /or1k/tags/rel-0-3-0-rc2
244 removed some ugly absolete code from parse.c markom 8328d 01h /or1k/tags/rel-0-3-0-rc2
243 sample config script added markom 8328d 01h /or1k/tags/rel-0-3-0-rc2
242 removed GlobalMode markom 8328d 01h /or1k/tags/rel-0-3-0-rc2

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.