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[/] [or1k/] [tags/] [rel_10] - Rev 1011

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Rev Log message Author Age Path
1011 Removed some commented RTL. Fixed SR/ESR flag bug. lampret 7992d 01h /or1k/tags/rel_10
1010 Import ivang 7996d 04h /or1k/tags/rel_10
1009 Import ivang 7996d 04h /or1k/tags/rel_10
1008 Import ivang 7996d 05h /or1k/tags/rel_10
1007 Import ivang 7996d 05h /or1k/tags/rel_10
1006 Import ivang 7996d 05h /or1k/tags/rel_10
1005 Import ivang 7996d 05h /or1k/tags/rel_10
1004 Now every ramdisk image should have init program. simons 7996d 14h /or1k/tags/rel_10
1003 cuc temporary files are deleted upon exiting markom 7996d 14h /or1k/tags/rel_10
1002 Now every ramdisk image should have init program. simons 7996d 14h /or1k/tags/rel_10
1001 fixed load/store state machine verilog generation errors markom 7996d 14h /or1k/tags/rel_10
1000 IC/DC cache enable routines fixed. simons 7996d 14h /or1k/tags/rel_10
999 Now every ramdisk image should have init program. simons 7996d 15h /or1k/tags/rel_10
998 added missing fout initialization markom 7996d 17h /or1k/tags/rel_10
997 PRINTF should be used instead of printf; command redirection repaired markom 7996d 18h /or1k/tags/rel_10
996 some minor bugs fixed markom 7997d 17h /or1k/tags/rel_10
994 Store buffer has been tested and it works. BY default it is still disabled until uClinux confirms correct operation on FPGA board. lampret 7998d 00h /or1k/tags/rel_10
993 Fixed IMMU bug. lampret 7998d 00h /or1k/tags/rel_10
992 A bug when cache enabled and bus error comes fixed. simons 7998d 09h /or1k/tags/rel_10
991 Different memory controller. simons 7998d 09h /or1k/tags/rel_10
990 Test is now complete. simons 7998d 10h /or1k/tags/rel_10
989 c++ is making problems so, for now, it is excluded. simons 7999d 17h /or1k/tags/rel_10
988 ORP architecture supported. simons 8000d 09h /or1k/tags/rel_10
987 ORP architecture supported. simons 8000d 16h /or1k/tags/rel_10
986 outputs out of function are not registered anymore markom 8000d 17h /or1k/tags/rel_10
985 DTLB translation doesn't work on or1ksim when IC/DC enabled. lampret 8001d 04h /or1k/tags/rel_10
984 Disable SB until it is tested lampret 8001d 05h /or1k/tags/rel_10
983 First checkin lampret 8001d 07h /or1k/tags/rel_10
982 Moved to sim/bin lampret 8001d 07h /or1k/tags/rel_10
981 First checkin. lampret 8001d 07h /or1k/tags/rel_10

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