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[/] [or1k/] [tags/] [rel_12/] [or1200/] - Rev 179

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Rev Log message Author Age Path
179 Sim run script lampret 8366d 09h /or1k/tags/rel_12/or1200
178 Some test code lampret 8366d 09h /or1k/tags/rel_12/or1200
177 Improved wb_sram model lampret 8366d 09h /or1k/tags/rel_12/or1200
176 IC enable/disable. lampret 8366d 09h /or1k/tags/rel_12/or1200
172 Removing obsolete files. lampret 8370d 13h /or1k/tags/rel_12/or1200
171 Added monitor.v and timescale.v lampret 8370d 14h /or1k/tags/rel_12/or1200
170 Added cfg regs. Moved all defines into one defines.v file. More cleanup. lampret 8370d 14h /or1k/tags/rel_12/or1200
169 Fixed memory cells. Moved monitor.h into monitor.v lampret 8370d 14h /or1k/tags/rel_12/or1200
168 Major clean-up. lampret 8374d 04h /or1k/tags/rel_12/or1200
166 Fixed RAM's oen bug. Cache bypass under development. lampret 8392d 14h /or1k/tags/rel_12/or1200
165 Added variable ack of WB transfers (see NODELAY_WBx). lampret 8392d 14h /or1k/tags/rel_12/or1200
164 *** empty log message *** lampret 8394d 16h /or1k/tags/rel_12/or1200
163 Forgot files.f file. lampret 8394d 16h /or1k/tags/rel_12/or1200
162 Benches (under development). lampret 8394d 16h /or1k/tags/rel_12/or1200
161 Development version of RTL. Libraries are missing. lampret 8394d 16h /or1k/tags/rel_12/or1200
160 simulation script lampret 8394d 16h /or1k/tags/rel_12/or1200
159 synthesis scripts lampret 8394d 17h /or1k/tags/rel_12/or1200
117 changed some SPR addresses, added load/store data debug match condition, fixed some typos. lampret 8447d 06h /or1k/tags/rel_12/or1200
112 A lot of changes. lampret 8451d 07h /or1k/tags/rel_12/or1200
111 Too many changes to count. See revision insde docs. lampret 8451d 07h /or1k/tags/rel_12/or1200
96 First import. lampret 8474d 07h /or1k/tags/rel_12/or1200

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