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[/] [or1k/] [tags/] [rel_12] - Rev 657

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Rev Log message Author Age Path
657 VGA console support added with frame buffer driver for CRT engine. simons 8191d 01h /or1k/tags/rel_12
656 VGA console support added with frame buffer driver for CRT engine. simons 8191d 01h /or1k/tags/rel_12
655 TLB registers addresses changed. simons 8193d 17h /or1k/tags/rel_12
654 This is repaired in new versions of uClinux. simons 8193d 18h /or1k/tags/rel_12
653 Some cleanup. simons 8193d 18h /or1k/tags/rel_12
652 Some cleanup. simons 8193d 18h /or1k/tags/rel_12
651 Some cleanup. simons 8193d 19h /or1k/tags/rel_12
650 Some cleanup. simons 8193d 19h /or1k/tags/rel_12
649 Some cleanup. simons 8193d 19h /or1k/tags/rel_12
648 fb now works in system memory markom 8195d 05h /or1k/tags/rel_12
647 some changes to fb to make it compatible with HW markom 8195d 23h /or1k/tags/rel_12
646 some bugs fixed markom 8196d 01h /or1k/tags/rel_12
645 simple frame buffer peripheral with test added markom 8196d 05h /or1k/tags/rel_12
644 Modified logging of SPR accesses. Logging only explicit instruction accesses. ivang 8197d 00h /or1k/tags/rel_12
643 Quick bug fix. ivang 8197d 00h /or1k/tags/rel_12
642 Modified logging of SPR accesses. Logging only explicit instruction accesses. ivang 8197d 00h /or1k/tags/rel_12
641 Modified logging of SPR accesses. Logging only explicit instruction accesses. ivang 8197d 00h /or1k/tags/rel_12
640 Merge profiler and mprofiler with sim. ivang 8197d 02h /or1k/tags/rel_12
639 MMU cache inhibit bit test added. simons 8199d 16h /or1k/tags/rel_12
638 TLBTR CI bit is now working properly. simons 8199d 16h /or1k/tags/rel_12
637 Updated file names. lampret 8199d 17h /or1k/tags/rel_12
636 Fixed combinational loops. lampret 8199d 18h /or1k/tags/rel_12
635 Fixed Makefile bug. ivang 8199d 19h /or1k/tags/rel_12
634 configure.in : fixed to build start/Makefile
start.S : l.jalr r9 -> l.jr r9

Added missing files.		 ivang 8200d 21h /or1k/tags/rel_12
633 Bug fix in command line parser. ivang 8200d 21h /or1k/tags/rel_12
632 profiler and mprofiler merged into sim. ivang 8201d 16h /or1k/tags/rel_12
631 Real cache access is simulated now. simons 8202d 15h /or1k/tags/rel_12
630 some bug fixes in store buffer analysis markom 8203d 00h /or1k/tags/rel_12
629 typo fixed markom 8203d 04h /or1k/tags/rel_12
627 or32 restored markom 8203d 04h /or1k/tags/rel_12

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