| Rev |
Log message |
Author |
Age |
Path |
| 1167 |
Corrected offset of TSS field within task_struct. |
csanchez |
7669d 08h |
/or1k/tags/rel_15 |
| 1166 |
Fixed problem with relocations of non-allocated sections. |
csanchez |
7669d 08h |
/or1k/tags/rel_15 |
| 1165 |
timeout bug fixed; contribution by Carlos |
markom |
7686d 01h |
/or1k/tags/rel_15 |
| 1161 |
When OR1200_NO_IMMU and OR1200_NO_IC are not both defined or undefined at the same time, results in a IC bug. Fixed. |
lampret |
7689d 14h |
/or1k/tags/rel_15 |
| 1160 |
added missing .rodata.* section into rom linker script |
phoenix |
7720d 14h |
/or1k/tags/rel_15 |
| 1159 |
No functional changes. Added defines to disable implementation of multiplier/MAC |
lampret |
7732d 17h |
/or1k/tags/rel_15 |
| 1158 |
Added simple uart test case. |
lampret |
7733d 18h |
/or1k/tags/rel_15 |
| 1157 |
Added syscall test case. |
lampret |
7733d 19h |
/or1k/tags/rel_15 |
| 1156 |
Tick timer test case added. |
lampret |
7734d 15h |
/or1k/tags/rel_15 |
| 1155 |
No functional change. Only added customization for exception vectors. |
lampret |
7735d 19h |
/or1k/tags/rel_15 |
| 1154 |
When using tty channel, put the serial port into raw mode (no echo, no
CR/LF conversion, no other line discipline/buffering). |
sfurman |
7743d 10h |
/or1k/tags/rel_15 |
| 1153 |
When multiple interrupts were pending, e.g. TX buffer empty and RX
available, reading the UART's IIR register could potentially clear a
TX interrupt before it had been sent to the processor, thus dropping
the interrupt permanently.
Fix tested w/ both eCos and uclinux. |
sfurman |
7743d 21h |
/or1k/tags/rel_15 |
| 1152 |
*** empty log message *** |
phoenix |
7744d 01h |
/or1k/tags/rel_15 |
| 1151 |
*** empty log message *** |
phoenix |
7744d 01h |
/or1k/tags/rel_15 |
| 1150 |
remove unneded include |
phoenix |
7744d 02h |
/or1k/tags/rel_15 |
| 1149 |
*** empty log message *** |
phoenix |
7744d 14h |
/or1k/tags/rel_15 |
| 1148 |
*** empty log message *** |
phoenix |
7744d 14h |
/or1k/tags/rel_15 |
| 1147 |
remove unneeded include |
phoenix |
7744d 14h |
/or1k/tags/rel_15 |
| 1146 |
cygwin fix |
phoenix |
7744d 14h |
/or1k/tags/rel_15 |
| 1145 |
1) Fix trivial bug w/ transmitter empty interrupts that I introduced in the
last check-in.
2) Improve printed output from debugging-only uart_status() routine. |
sfurman |
7744d 15h |
/or1k/tags/rel_15 |
| 1144 |
Speed up gdb when running with serial targets:
When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)
When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump. |
sfurman |
7746d 21h |
/or1k/tags/rel_15 |
| 1143 |
Make UART transmitter-empty interrupts match both 16450 and 16550 behavior. |
sfurman |
7747d 11h |
/or1k/tags/rel_15 |
| 1142 |
Speed up gdb when running with serial targets:
When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)
When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump. |
sfurman |
7747d 11h |
/or1k/tags/rel_15 |
| 1141 |
WB = 1/2 RISC clock test code enabled. |
lampret |
7748d 20h |
/or1k/tags/rel_15 |
| 1140 |
Fixed OR1200_CLKDIV_x_SUPPORTED defines. Fixed order of ifdefs. |
lampret |
7748d 20h |
/or1k/tags/rel_15 |
| 1139 |
Fixed OR1200_CLKDIV_x_SUPPORTED defines. Better description. |
lampret |
7748d 20h |
/or1k/tags/rel_15 |
| 1138 |
Added some information how to run simulations. |
lampret |
7749d 16h |
/or1k/tags/rel_15 |
| 1137 |
Added RFRAM generic and Altera lpm library. |
lampret |
7749d 16h |
/or1k/tags/rel_15 |
| 1136 |
Add altera lpm library. |
lampret |
7749d 16h |
/or1k/tags/rel_15 |
| 1135 |
Added get_gpr support for OR1200_RFRAM_GENERIC |
lampret |
7749d 16h |
/or1k/tags/rel_15 |
