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[/] [or1k/] [tags/] [rel_21/] [or1200] - Rev 536

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Rev Log message Author Age Path
536 Fixed typo. OR1200_REGISTERED_OUTPUTS was not defined. Should be. lampret 8223d 11h /or1k/tags/rel_21/or1200
512 Uncommented OR1200_REGISTERED_OUTPUTS for FPGA target. lampret 8227d 15h /or1k/tags/rel_21/or1200
504 New prefixes for RTL files, prefixed module names. Updated cache controllers and MMUs. lampret 8228d 04h /or1k/tags/rel_21/or1200
402 Added OR1200_GENERIC_MULTP2_32X32 and OR1200_ASIC_MULTP2_32X32 lampret 8258d 07h /or1k/tags/rel_21/or1200
401 *** empty log message *** simons 8261d 17h /or1k/tags/rel_21/or1200
400 force_dslot_fetch does not work - allways zero. simons 8261d 17h /or1k/tags/rel_21/or1200
399 Trap insn couses break after exits ex_insn. simons 8261d 17h /or1k/tags/rel_21/or1200
391 Fixed except_stop width and fixed EX PC for 1400444f no-ops. lampret 8264d 13h /or1k/tags/rel_21/or1200
390 Changed instantiation name of VS RAMs. lampret 8264d 15h /or1k/tags/rel_21/or1200
387 Now FPGA and ASIC target are separate. lampret 8264d 16h /or1k/tags/rel_21/or1200
386 Fixed VS RAM instantiation - again. lampret 8264d 16h /or1k/tags/rel_21/or1200
370 Program counter divided to PPC and NPC. simons 8268d 14h /or1k/tags/rel_21/or1200
367 Changed DSR/DRR behavior and exception detection. lampret 8269d 03h /or1k/tags/rel_21/or1200
365 Added wb_cyc_o assignment after it was removed by accident. lampret 8269d 22h /or1k/tags/rel_21/or1200
360 Added OR1200_REGISTERED_INPUTS. lampret 8271d 15h /or1k/tags/rel_21/or1200
359 Added optional sampling of inputs. lampret 8271d 15h /or1k/tags/rel_21/or1200
358 Fixed virtual silicon single-port rams instantiation. lampret 8271d 15h /or1k/tags/rel_21/or1200
357 Fixed dbg_is_o assignment width. lampret 8271d 15h /or1k/tags/rel_21/or1200
356 Break point bug fixed simons 8271d 17h /or1k/tags/rel_21/or1200
354 Fixed width of du_except. lampret 8272d 11h /or1k/tags/rel_21/or1200
353 Cashes disabled. simons 8272d 22h /or1k/tags/rel_21/or1200
352 OR1200_REGISTERED_OUTPUTS can now be enabled. lampret 8274d 01h /or1k/tags/rel_21/or1200
351 Fixed some l.trap typos. lampret 8274d 02h /or1k/tags/rel_21/or1200
350 For GDB changed single stepping and disabled trap exception. lampret 8274d 04h /or1k/tags/rel_21/or1200
338 Added 'setpc'. Renamed some signals (except_flushpipe into flushpipe etc) lampret 8279d 02h /or1k/tags/rel_21/or1200
337 Fixed tick timer interrupt reporting by using TTCR[IP] bit. lampret 8279d 02h /or1k/tags/rel_21/or1200
328 Moved flag bit into SR. Changed RF enable from constant enable to dynamic enable for read ports. lampret 8280d 10h /or1k/tags/rel_21/or1200
316 Fixed exceptions. lampret 8282d 08h /or1k/tags/rel_21/or1200
271 Added missing endif lampret 8286d 21h /or1k/tags/rel_21/or1200
265 Modified virtual silicon instantiations. lampret 8289d 17h /or1k/tags/rel_21/or1200

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