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[/] [or1k/] [tags/] [rel_21] - Rev 1007

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Rev Log message Author Age Path
1007 Import ivang 7997d 13h /or1k/tags/rel_21
1006 Import ivang 7997d 13h /or1k/tags/rel_21
1005 Import ivang 7997d 14h /or1k/tags/rel_21
1004 Now every ramdisk image should have init program. simons 7997d 22h /or1k/tags/rel_21
1003 cuc temporary files are deleted upon exiting markom 7997d 22h /or1k/tags/rel_21
1002 Now every ramdisk image should have init program. simons 7997d 22h /or1k/tags/rel_21
1001 fixed load/store state machine verilog generation errors markom 7997d 22h /or1k/tags/rel_21
1000 IC/DC cache enable routines fixed. simons 7997d 23h /or1k/tags/rel_21
999 Now every ramdisk image should have init program. simons 7998d 00h /or1k/tags/rel_21
998 added missing fout initialization markom 7998d 01h /or1k/tags/rel_21
997 PRINTF should be used instead of printf; command redirection repaired markom 7998d 02h /or1k/tags/rel_21
996 some minor bugs fixed markom 7999d 01h /or1k/tags/rel_21
994 Store buffer has been tested and it works. BY default it is still disabled until uClinux confirms correct operation on FPGA board. lampret 7999d 09h /or1k/tags/rel_21
993 Fixed IMMU bug. lampret 7999d 09h /or1k/tags/rel_21
992 A bug when cache enabled and bus error comes fixed. simons 7999d 18h /or1k/tags/rel_21
991 Different memory controller. simons 7999d 18h /or1k/tags/rel_21
990 Test is now complete. simons 7999d 18h /or1k/tags/rel_21
989 c++ is making problems so, for now, it is excluded. simons 8001d 02h /or1k/tags/rel_21
988 ORP architecture supported. simons 8001d 17h /or1k/tags/rel_21
987 ORP architecture supported. simons 8002d 01h /or1k/tags/rel_21
986 outputs out of function are not registered anymore markom 8002d 01h /or1k/tags/rel_21
985 DTLB translation doesn't work on or1ksim when IC/DC enabled. lampret 8002d 13h /or1k/tags/rel_21
984 Disable SB until it is tested lampret 8002d 13h /or1k/tags/rel_21
983 First checkin lampret 8002d 15h /or1k/tags/rel_21
982 Moved to sim/bin lampret 8002d 15h /or1k/tags/rel_21
981 First checkin. lampret 8002d 15h /or1k/tags/rel_21
980 Removed sim.tcl that shouldn't be here. lampret 8002d 15h /or1k/tags/rel_21
979 Removed old test case binaries. lampret 8002d 15h /or1k/tags/rel_21
978 Added variable delay for SRAM. lampret 8002d 15h /or1k/tags/rel_21
977 Added store buffer. lampret 8002d 15h /or1k/tags/rel_21

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