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[/] [or1k/] [tags/] [rel_24] - Rev 174

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174 Few changes that should be done previously:
- machine.h replaced by spr_defs.h
- if reset label does not exist, boot from 0x0100		 markom 8398d 16h /or1k/tags/rel_24
173 - profiler added, use e.g.:
make profiler
./sim -profile -fast executable
./profiler -g [-c]

(no special compiling options necessary)		 markom 8400d 20h /or1k/tags/rel_24
172 Removing obsolete files. lampret 8401d 23h /or1k/tags/rel_24
171 Added monitor.v and timescale.v lampret 8401d 23h /or1k/tags/rel_24
170 Added cfg regs. Moved all defines into one defines.v file. More cleanup. lampret 8401d 23h /or1k/tags/rel_24
169 Fixed memory cells. Moved monitor.h into monitor.v lampret 8401d 23h /or1k/tags/rel_24
168 Major clean-up. lampret 8405d 13h /or1k/tags/rel_24
167 - SPR values corrected
- testbenches now work
- lot of optimizations, use --disable-debugmod for optimal performance
- some tick timer bugs fixed		 markom 8406d 12h /or1k/tags/rel_24
166 Fixed RAM's oen bug. Cache bypass under development. lampret 8423d 23h /or1k/tags/rel_24
165 Added variable ack of WB transfers (see NODELAY_WBx). lampret 8423d 23h /or1k/tags/rel_24
164 *** empty log message *** lampret 8426d 02h /or1k/tags/rel_24
163 Forgot files.f file. lampret 8426d 02h /or1k/tags/rel_24
162 Benches (under development). lampret 8426d 02h /or1k/tags/rel_24
161 Development version of RTL. Libraries are missing. lampret 8426d 02h /or1k/tags/rel_24
160 simulation script lampret 8426d 02h /or1k/tags/rel_24
159 synthesis scripts lampret 8426d 02h /or1k/tags/rel_24
158 Initial RTEMS import chris 8435d 16h /or1k/tags/rel_24
157 Update simons 8442d 19h /or1k/tags/rel_24
156 File moved to opcode. simons 8442d 19h /or1k/tags/rel_24
155 Update simons 8442d 19h /or1k/tags/rel_24
154 Updated for new runtime environment chris 8448d 19h /or1k/tags/rel_24
153 Writes to SPR_PC are now enabled chris 8448d 19h /or1k/tags/rel_24
152 Breakpoint exceptions from single step are not printed now. chris 8448d 19h /or1k/tags/rel_24
151 Typo in the previous commit. Sorry. chris 8448d 20h /or1k/tags/rel_24
150 Fixed some single stepping issues chris 8448d 20h /or1k/tags/rel_24
149 Fixed bug where disassemble command caused a segmentation fault chris 8449d 22h /or1k/tags/rel_24
148 Replace single stepping patch that got overwritten chris 8449d 22h /or1k/tags/rel_24
147 Initial checkin of instructions chris 8450d 14h /or1k/tags/rel_24
146 Mofications to work with or1ksim JTAG based simulation chris 8450d 14h /or1k/tags/rel_24
145 Modifications necessary for functional gdb debugging interface chris 8450d 14h /or1k/tags/rel_24

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