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[/] [or1k/] [tags/] [rel_28/] - Rev 1241

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Rev Log message Author Age Path
1241 make it work with MMU enabled phoenix 7503d 07h /or1k/tags/rel_28
1240 additional functions to bypass cache and mmu needed for peripheral devices phoenix 7503d 07h /or1k/tags/rel_28
1228 Exception prefix configuration changed to match branch_qmem configuration. simons 7518d 02h /or1k/tags/rel_28
1223 first import dries 7526d 00h /or1k/tags/rel_28
1222 cfmakeraw is not avaliable on cygwin phoenix 7527d 09h /or1k/tags/rel_28
1218 segfault when there is no memory context fix phoenix 7551d 10h /or1k/tags/rel_28
1211 New wb_biu for iwb interface. lampret 7559d 11h /or1k/tags/rel_28
1208 Added useless signal genpc_stop_refetch. lampret 7559d 11h /or1k/tags/rel_28
1207 Static exception prefix. lampret 7559d 11h /or1k/tags/rel_28
1205 fix for gdb_debug config phoenix 7565d 20h /or1k/tags/rel_28
1204 added additional field into executed log wich besides EA also prints PA (physical address) phoenix 7583d 07h /or1k/tags/rel_28
1203 value stored in ITLB and DTLB match registers was wrong. fixed. phoenix 7583d 07h /or1k/tags/rel_28
1202 at exception print insn number to ease debugging phoenix 7583d 08h /or1k/tags/rel_28
1200 mbist signals updated according to newest convention markom 7608d 03h /or1k/tags/rel_28
1199 Daniel Wiklund: Removed multiple entries of debug/Makefile in configure danwi 7612d 04h /or1k/tags/rel_28
1198 make it compile on RH 8,9 phoenix 7637d 19h /or1k/tags/rel_28
1197 disabled ram-init of ps2 (old) +
changed MAC type into DOS type, so that Xilinx ISE can work with it
dries 7642d 23h /or1k/tags/rel_28
1196 removed second debug/Makefile (credits: Daniel Wiklund - danwi@isy.liu.se) dries 7643d 01h /or1k/tags/rel_28
1195 made the project file a little bit more universal dries 7643d 02h /or1k/tags/rel_28
1194 correct all the syntax errors dries 7643d 02h /or1k/tags/rel_28
1193 disabled SRAM_GENERIC and added comment +
corrected 'wb_err' into 'wb_err_o'
dries 7643d 02h /or1k/tags/rel_28
1192 disabled 'bench_defines.v' during synthesis +
added define to specify usage of flash instruction address
dries 7643d 04h /or1k/tags/rel_28
1191 disabled 'bench_defines.v' during synthesis +
added define to specify usage of flash instruction address
dries 7643d 04h /or1k/tags/rel_28
1188 Added support for rams with byte write access. simons 7659d 02h /or1k/tags/rel_28
1186 Added support for rams with byte write access. simons 7660d 01h /or1k/tags/rel_28
1184 Scan signals mess fixed. simons 7666d 18h /or1k/tags/rel_28
1183 OpenRISC port of gdb-5.3 straightforwardly derived from gdb-5.0 sfurman 7671d 10h /or1k/tags/rel_28
1181 Initial import of unmodified gdb-5.3 source on vendor branch sfurman 7671d 12h /or1k/tags/rel_28
1179 BIST interface added for Artisan memory instances. simons 7674d 22h /or1k/tags/rel_28
1178 avoid another immu exception that should not happen phoenix 7704d 09h /or1k/tags/rel_28

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