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[/] [or1k/] [tags/] [stable_0_2_0/] - Rev 1242

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Rev Log message Author Age Path
1242 Added "cm" command to copy data inside memory.
Make or1ksim work on little endian platforms.
Port to Mac OS X.
Some bugfixes.
Allow JTAG write access to read-only memory regions.		 hpanther 7468d 23h /or1k/tags/stable_0_2_0
1241 make it work with MMU enabled phoenix 7473d 09h /or1k/tags/stable_0_2_0
1240 additional functions to bypass cache and mmu needed for peripheral devices phoenix 7473d 09h /or1k/tags/stable_0_2_0
1228 Exception prefix configuration changed to match branch_qmem configuration. simons 7488d 04h /or1k/tags/stable_0_2_0
1223 first import dries 7496d 03h /or1k/tags/stable_0_2_0
1222 cfmakeraw is not avaliable on cygwin phoenix 7497d 11h /or1k/tags/stable_0_2_0
1218 segfault when there is no memory context fix phoenix 7521d 12h /or1k/tags/stable_0_2_0
1211 New wb_biu for iwb interface. lampret 7529d 13h /or1k/tags/stable_0_2_0
1208 Added useless signal genpc_stop_refetch. lampret 7529d 13h /or1k/tags/stable_0_2_0
1207 Static exception prefix. lampret 7529d 13h /or1k/tags/stable_0_2_0
1205 fix for gdb_debug config phoenix 7535d 22h /or1k/tags/stable_0_2_0
1204 added additional field into executed log wich besides EA also prints PA (physical address) phoenix 7553d 10h /or1k/tags/stable_0_2_0
1203 value stored in ITLB and DTLB match registers was wrong. fixed. phoenix 7553d 10h /or1k/tags/stable_0_2_0
1202 at exception print insn number to ease debugging phoenix 7553d 10h /or1k/tags/stable_0_2_0
1200 mbist signals updated according to newest convention markom 7578d 06h /or1k/tags/stable_0_2_0
1199 Daniel Wiklund: Removed multiple entries of debug/Makefile in configure danwi 7582d 06h /or1k/tags/stable_0_2_0
1198 make it compile on RH 8,9 phoenix 7607d 21h /or1k/tags/stable_0_2_0
1197 disabled ram-init of ps2 (old) +
changed MAC type into DOS type, so that Xilinx ISE can work with it		 dries 7613d 02h /or1k/tags/stable_0_2_0
1196 removed second debug/Makefile (credits: Daniel Wiklund - danwi@isy.liu.se) dries 7613d 03h /or1k/tags/stable_0_2_0
1195 made the project file a little bit more universal dries 7613d 04h /or1k/tags/stable_0_2_0
1194 correct all the syntax errors dries 7613d 04h /or1k/tags/stable_0_2_0
1193 disabled SRAM_GENERIC and added comment +
corrected 'wb_err' into 'wb_err_o'		 dries 7613d 05h /or1k/tags/stable_0_2_0
1192 disabled 'bench_defines.v' during synthesis +
added define to specify usage of flash instruction address		 dries 7613d 06h /or1k/tags/stable_0_2_0
1191 disabled 'bench_defines.v' during synthesis +
added define to specify usage of flash instruction address		 dries 7613d 06h /or1k/tags/stable_0_2_0
1188 Added support for rams with byte write access. simons 7629d 05h /or1k/tags/stable_0_2_0
1186 Added support for rams with byte write access. simons 7630d 04h /or1k/tags/stable_0_2_0
1184 Scan signals mess fixed. simons 7636d 21h /or1k/tags/stable_0_2_0
1183 OpenRISC port of gdb-5.3 straightforwardly derived from gdb-5.0 sfurman 7641d 12h /or1k/tags/stable_0_2_0
1181 Initial import of unmodified gdb-5.3 source on vendor branch sfurman 7641d 15h /or1k/tags/stable_0_2_0
1179 BIST interface added for Artisan memory instances. simons 7645d 00h /or1k/tags/stable_0_2_0

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