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[/] [or1k/] [tags/] [stable_0_2_0/] - Rev 219

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Rev Log message Author Age Path
219 Fixed sensitivity list. lampret 8330d 19h /or1k/tags/stable_0_2_0
218 Removed params from generic_XX.v. Added translate_off/on in sprs.v and id.v. Removed spr_addr from dc.v and ic.v. Fixed CR+LF. lampret 8330d 19h /or1k/tags/stable_0_2_0
217 Fixed some synthesis warnings. Configured with caches and MMUs. lampret 8332d 14h /or1k/tags/stable_0_2_0
216 No longer needed. lampret 8338d 00h /or1k/tags/stable_0_2_0
215 MP3 version. lampret 8338d 00h /or1k/tags/stable_0_2_0
214 Removed redundant "long long" checks erez 8348d 02h /or1k/tags/stable_0_2_0
213 Added test5 for DMA erez 8348d 03h /or1k/tags/stable_0_2_0
212 Added DMA erez 8348d 03h /or1k/tags/stable_0_2_0
211 Added check for "long long" erez 8348d 03h /or1k/tags/stable_0_2_0
210 Updated debug. More cleanup. Added MAC. lampret 8351d 08h /or1k/tags/stable_0_2_0
209 Update debug. lampret 8353d 13h /or1k/tags/stable_0_2_0
208 Initial checkin with working port to or1k chris 8355d 01h /or1k/tags/stable_0_2_0
207 Several major changes to allow gdb to work with an Or1k implementation
that does not need a writeable PC. This version will use the breakpoint
vector and install a new vector into the EPC register, and then single
step out of the breakpoint exception. The breakpoint exception vector
must include only 2 commands: l.rfe and l.nop. Anything else and this
gdb version will fail w/ or1ksim.		 chris 8355d 05h /or1k/tags/stable_0_2_0
206 Several modifications to support gdb in a new exception style mode.
This new version works with gdb, and does not require the simulator
to implement a writeable PC.		 chris 8355d 05h /or1k/tags/stable_0_2_0
205 Adding debug capabilities. Half done. lampret 8359d 08h /or1k/tags/stable_0_2_0
204 Added function prototypes to stop gcc from complaining erez 8362d 00h /or1k/tags/stable_0_2_0
203 Updated from xess branch. lampret 8363d 13h /or1k/tags/stable_0_2_0
202 changed configure.in and acconfig.h to check for long long
reran autoheader & autoconf		 erez 8368d 21h /or1k/tags/stable_0_2_0
201 readfunc() and writefunc() now use unsigned long values instead of unsigned char. erez 8368d 21h /or1k/tags/stable_0_2_0
200 Initial import simons 8372d 04h /or1k/tags/stable_0_2_0
199 Initial import simons 8372d 05h /or1k/tags/stable_0_2_0
198 Moved from testbench.old simons 8374d 16h /or1k/tags/stable_0_2_0
197 This is not used any more. simons 8374d 16h /or1k/tags/stable_0_2_0
196 Configuration SPRs added. simons 8374d 17h /or1k/tags/stable_0_2_0
195 New test added. simons 8374d 17h /or1k/tags/stable_0_2_0
194 Fixed a bug for little endian architectures. Could cause a hang of
gdb under some circumstances.		 chris 8375d 01h /or1k/tags/stable_0_2_0
193 Declared RISCOP.RESET to be volatile so that -O2 optimization would
not optimize away the correct behavior by trying to be too clever.		 chris 8375d 01h /or1k/tags/stable_0_2_0
192 Removed GlobalMode reference causing problems for --disable-debugmod
option.		 chris 8375d 10h /or1k/tags/stable_0_2_0
191 Added UART jitter var to sim config chris 8376d 06h /or1k/tags/stable_0_2_0
190 Added jitter initialization chris 8376d 06h /or1k/tags/stable_0_2_0

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